------- Comment From [email protected] 2026-01-30 04:46 EDT-------
Hello Frank, I was a bit in a hurry last evening. Sorry for not having
provided better information on the individual findings. The list of commits in
the [Fix] section is indeed incomplete. Strictly onle the following was
missing:
76445f36a2f9 ("s390: Add arch15 Concurrent-Functions Facility insns")
My other Binutils related findings are more "nice to have". See below.
IIUC this request was to get GDB to support all of the z17 instructions
in disassembly, which requires its Binutils sources to get updated. At
least that is how I understand the subject "Internal binutils code
requires updates made for IBM z17 in binutils already". But apparently
it turned out that Binutils was not updated (at least on noble). Is
that why Binutils was updated first? Is GDB still planned to be
updated?
1. Missing instructions in Binutils (and GDB)
The following z17 (arch15) instructions are missing in the opcode table
and should be added (together with their respective tests in zarch-
arch15.{d|s}): cal, calg, calgf, pfcr.
2bf1f788bd79 ("s390: Add missing extended mnemonics") [not z17 related]
a98a6fa2d8ef ("s390: Add arch15 instructions")
76445f36a2f9 ("s390: Add arch15 Concurrent-Functions Facility insns")
981fe5fd80fa ("s390: Add support for z17 as CPU name")
2. Instruction format changes in Binutils
Those are not strictly z17 related. It would make sense to add them so
that the assembler syntax is on-par. It should not be an issue to leave
them out though, as they only enable the user to specify currently
reserved operand bits (that is why the 5-bit and 6-bit operands are
removed and replaced by 8-bit ones) and thus would enable to code
possible future variants of the instructions. Currently I am not aware
of any such plans, so that is not a hint in any form.
fca086d928a9 ("s390: Align optional operand definition to specs")
a3f1e7c56a60 ("s390: Simplify (dis)assembly of insn operands with const bits")
[pre-req for below]
b8b60e2d0cb0 ("s390: Relax risbg[n]z, risb{h|l}gz, {rns|ros|rxs}bgt operand
constraints")
3. Optional operand syntax changes in assembler
Again this is not strictly z17 related. It would make sense to add
them so that the assembler syntax is on-par. It's up to you whether
that makes sense or not. My take is that it would be preferable if the
assembler would accept one specific set of syntax if it is z17 capable.
dd327181e96b ("s390: Do not erroneously use base operand value for length
operand")
aacf780bca29 ("s390: Allow to explicitly omit base register operand in
assembly")
e75cfa9f0f81 ("s390: Document syntax to omit base register operand")
453f481aabf6 ("s390: Treat addressing operand sequence as one in assembler")
2727c14ec4bc ("s390: Simplify parsing of omitted index register operand")
c76c8e20985d ("s390: Error if vector index register omitted in assembly")
Note that there were related disassembler changes, in case you care:
75a28d1a97ac ("s390: Print base register 0 as "0" in disassembly")
7507fe37980e ("s390: Fix disassembly of optional addressing operands")
36bbf8646c8b ("s390: Treat addressing operand sequence as one in disassembler")
e99d28e6bd62 ("s390: Do not omit vector index register 0 in disassembly")
Note that in general it would be preferable to always apply the same
changes made to the Binutils sources used to build the binutils package
also to the Binutils sources used to build GBD.
Thanks and regards,
Jens
--
You received this bug notification because you are a member of Ubuntu
Bugs, which is subscribed to Ubuntu.
https://bugs.launchpad.net/bugs/2108997
Title:
[SRU] GDB: Internal binutils code requires updates made for IBM z17 in
binutils already
To manage notifications about this bug go to:
https://bugs.launchpad.net/ubuntu-z-systems/+bug/2108997/+subscriptions
--
ubuntu-bugs mailing list
[email protected]
https://lists.ubuntu.com/mailman/listinfo/ubuntu-bugs
