561b8d48f s390: Lower severity of assembler syntax errors from fatal to error f6cd3c4a8 s390: Enhance handling of syntax errors in assembler 11fe57be7 s390: Do not erroneously use base operand value for length operand 398065c7d s390: Correct setting of highgprs flag in ELF output c7fc47b27 s390: Add comments to assembler operand parsing logic 539328f9c s390: Add test cases for base/index register 0 bf1df8b98 s390: Add test case for disassembler option warn-areg-zero 15f367eea s390: Revise s390-specific assembler option descriptions a052bc7aa s390: Warn when register name type does not match operand 441a10e14 s390: Print base register 0 as "0" in disassembly fce30bb8b s390: Allow to explicitly omit base register operand in assembly 72ab3f885 s390: Provide operand number in assembler warning and error messages c81f07c05 s390: Be more verbose about missing operand type e6c40194d s390: Document syntax to omit base register operand e64fa3d04 s390: Simplify (dis)assembly of insn operands with const bits e3dbbe971 s390: Add arch15 instructions 78305ecc8 s390: Add arch15 instruction names c5ab651fe s390: Add arch15 Concurrent-Functions Facility insns d3110d9cc s390: Fix disassembly of optional addressing operands 089a164a6 s390: Treat addressing operand sequence as one in assembler cf6190f84 s390: Treat addressing operand sequence as one in disassembler a3ce50326 s390: Simplify parsing of omitted index register operand 146ab6ba4 s390: Additional tests for omitted base register operands b24c12bc9 s390: Do not omit vector index register 0 in disassembly 5d19f6e77 s390: Do not warn about vector index register 0 in assembly 2635bf9c7 s390: Error if vector index register omitted in assembly 3763d3c4c s390: Add support for z17 as CPU name
------- Comment From [email protected] 2026-02-03 03:43 EDT------- Hello Vladimir, comparing your list of commit subjects (the hashes make no sense to me) to mine shows the following differences: The following "missing" ones are most likely already integrated, as their changes were in the noble-proposed binutils source code that I verified: s390: Add missing extended mnemonics s390: Align optional operand definition to specs The following one is missing. Given you appear to be fine to include all of the assembler/disassembler syntax changes I would recommend to include this one as well: To me your list then looks complete. You could omit the following, which may require to resolve some merge conflicts though. So it is up to you. They should not hurt. Thanks and regards, Jens -- You received this bug notification because you are a member of Ubuntu Bugs, which is subscribed to Ubuntu. https://bugs.launchpad.net/bugs/2108997 Title: [SRU] GDB: Internal binutils code requires updates made for IBM z17 in binutils already To manage notifications about this bug go to: https://bugs.launchpad.net/ubuntu-z-systems/+bug/2108997/+subscriptions -- ubuntu-bugs mailing list [email protected] https://lists.ubuntu.com/mailman/listinfo/ubuntu-bugs
