Hi again,
as there was no answer, I try again...
My current problem is:
I have the Coldfire watchdog timer module (WTM) activated from the
bootloader. My setup is linux-2.6 (uClinux-20070130 patched to 20071107)
and I wrote a simple watchdog module that just keeps triggering the
watchdog up to now.
The kernel with embedded ramdisk image is loaded and the only flash
access should take place from the application accessing two seperate
sectors to store configuration data. (I once experimented with a JFFS2
filesystem which was mounted from the application, but dropped this
because it is not yet needed.)
However, the kernel seems to initialize something in the flash during
startup, because when I start this kernel/application on a device that
has never been used before, I get no kernel startup message, but the
device is reset by the watchdog timer before. When I start up the kernel
with the watchdog disabled, I can see that it takes much longer to
start up when it runs for the first time, but I do not see any log
messages pointing me to what is going on. (Regular startup time is
around 2.5-3 seconds, first-time is around 6 seconds)
The only thing I can see is that in my mtd5 partition (where the JFFS2
was placed before) there are some kind of "headers" written, but even
this seems to take place much later when the application is already
running. Searching the complete tree for mtd5 or mtdblock5 gives no
result (except for some other vendors/devices configuration).
Can anybody give me a hint where these accesses could come from?
Best regards,
Wolfgang
PS: this is my mtd partitioning:
static struct mtd_partition astro5373l_partitions[] =
{
{
.name = "Complete Flash",
.size = MTDPART_SIZ_FULL,
.offset = 0x00000000,
.mask_flags = MTD_WRITEABLE
}, {
.name = "bootloader",
.size = 512*1024,
.offset = 0x00000000,
.mask_flags = MTD_WRITEABLE
}, {
.name = "kernel",
.size = 2*1024*1024,
.offset = MTDPART_OFS_APPEND,
//.mask_flags = MTD_WRITEABLE
}, {
.name = "root",
.size = 11*256*1024,
.offset = MTDPART_OFS_APPEND,
//.mask_flags = MTD_WRITEABLE
}, {
.name = "FPGA",
.size = 11*256*1024,
.offset = MTDPART_OFS_APPEND,
//.mask_flags = MTD_WRITEABLE
}, {
.name = "data",
.size = 93*256*1024,
.offset = MTDPART_OFS_APPEND,
//.mask_flags = MTD_WRITEABLE
}, {
.name = "Parameters1",
.size = 256*1024,
.offset = MTDPART_OFS_APPEND,
//.mask_flags = MTD_WRITEABLE
}, {
.name = "Parameters2",
.size = 256*1024,
.offset = MTDPART_OFS_APPEND,
//.mask_flags = MTD_WRITEABLE
}, {
.name = "Parameters_ext",
.size = 256*1024,
.offset = MTDPART_OFS_APPEND,
//.mask_flags = MTD_WRITEABLE
}
};
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