Jim Donelson wrote:
>    I wonder why (on an SP machine) you don't just disable interrupts for
>    a few instructions and give yourself an atomic dec?

Yes, that's fine.

However, it's not secure to allow userspace to disable interrupts(*),
so we've talked about a custom instruction which lets userspace
disable interrupts for a maximum of 3/4 instructions, then the
hardware forces them on again.

(*) with an MMU; without an MMU there's no security anyway so it
doesn't matter as much.

Personally I think the ARM method is nicest because it doesn't need
any special hardware, but time-limited interrupt disabling may be a
little bit faster, or slower, depending on the architecture.

-- Jamie
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