Triode, while on this subject, not directly relevant to squeezelite, but
sort of, as it uses soxr for upsampling....
I spent a week working on and looking at OpenMP and SIMD with soxr. Not
sure what you are doing with Arch, using a pre-packaged soxr or your own
package, and not really relevant to the WB, which has the horse power to
start with.....
It is really important to get SIMD (NEON) enabled if the hardware can
support it, especially for single-core. Yes, there was some diddling
with the BBB USB driver, but glitchless upsampling to 384k on the BBB,
requires a soxr lib with SIMD enabled. (I suspect, that again CPU%
doesn't tell the whole story, but my hypothesis would be that the NEON
code gets handled by dedicated hardware/registers rather than burning
main CPU cycles, leaving the main proc to handle things like interrupts.
;))
Enabling SIMD meant hacking the cmake detection script, (which will only
return true on Intel), ...... My rpm spec file was doing the following
when building for armv7h*n*l. ie. with NEON.
Code:
--------------------
Patch0: soxr-fixes.patch
Patch1: soxr-FindSIMD-NEON.patch
%prep
%setup -q -n %{name}-%{version}-Source
%patch0 -p1
# If arm with neon, enable SIMD
%ifarch armv7hnl
%patch1 -p1
%endif
%build
rm -rf build && mkdir build && pushd build
export LDFLAGS="-Wl,--as-needed"
%cmake -DCMAKE_BUILD_TYPE=RelWithDebInfo\
%ifarch armv7hnl
-DWITH_SIMD=ON -DWITH_PFFFT=NO\
%endif
../
make %{?_smp_mflags}
--------------------
The patch to the cmake SIMD detection, to get it enabled on ARM, just
commented out the code so it will return 0! ;)
Code:
--------------------
--- soxr-0.1.1-Source/cmake/Modules/FindSIMD.cmake~ 2013-01-12
14:05:42.0000
00000 +0000
+++ soxr-0.1.1-Source/cmake/Modules/FindSIMD.cmake 2014-04-28
15:13:22.3744
81813 +0100
@@ -51,15 +51,15 @@
set (SIMD_C_TEST_SOURCE
"
-#include <xmmintrin.h>
+// #include <xmmintrin.h>
int main()
{
- __m128 a, b;
- float vals[4] = {0};
- a = _mm_loadu_ps (vals);
- b = a;
- b = _mm_add_ps (a,b);
- _mm_storeu_ps (vals,b);
+// __m128 a, b;
+// float vals[4] = {0};
+// a = _mm_loadu_ps (vals);
+// b = a;
+// b = _mm_add_ps (a,b);
+// _mm_storeu_ps (vals,b);
return 0;
}
")
--------------------
PS. Also, while on the subject of soxr. Seem to recall there was one
"essential" patch (only in git) after they last made a tar-ball release.
If not applied, from memory, you always end up with linear, even if you
pass option for intermediate or minimum phase. Might be worth checking
your Arch package has it applied if not already using your own.
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