Date: Thu, 11 Sep 2003 15:31:04 -0500 (CDT)
From: [EMAIL PROTECTED] (Peter da Silva)

 >Apparently the 7x00's PCI bus is not so good, because it had to support
 >the 601 processor which was pre-PCI, so even with a 604 or G3 it's
 >using a PCI interface designed for the 601.

 This is a good hypothesis because it fits the discussed facts, but it
 is not the case.   The 7x00 and 8x00 and 9x00 all have exactly the
 same PCI bus(ses) supported by the same Bandit chip bridge and
 separate bus arbiter, and the entire family of x500 + 7600 machines
 use the same ROM.

Sorry, misunderstanding there... I didn't mean to imply that the 7x00 was worse than the other first-generation PCI Powermacs, I was comparing it with the Beige G3s.

My apologies for misunderstanding. I was not following the thread carefully enough.


Let's verify that, though... I summon the spirit of Google...

Anyway, there's no mention of PCI in the PMC601 user's manual, that shows
up first with the 604e, via the MCP105/106 bridge memory controllers.

http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=MPC105-ARCHIVED

"The MPC105 PCI Bridge/Memory Controller provides a bridge between
 MPC603 or MPC604 microprocessors and the Peripheral Component
 Interconnect (PCI) bus."

So... Apple likely had to do some workaround to support PCI with the 601 CPU.

Doing their own PCI bridge would probably qualify as a workaround. :)

The PCI implementation in the x500/x600 machines definitely is quirky and it's bandwidth is limited in interesting ways. The Apple document "Designing_PCI_Cards_Drivers.pdf" in the chapter "Maximizing PCI Bus Performance" has some interesting information on the PCI busses of those early machines.


The most interesting is that for the early machines, the most bandwidth efficient type of PCI transfer requires that the memory space used not be "cache inhibited" and there are some wonky limitations on the command that sets this state. The end affect is that once one PCI card grabs the "fast" cache mode, other PCI cards are unlikely to be able to use the fast mode. Also, if the PCI card driver designer did not know to issue the "SetProcessorCacheMode" command, then his/her card will not be able to use the fast transfer mode.

This quirk of the early PCI Macs probably accounts for two things.

First, the poor performance of PCI cards that should do better. Most likely, their designers did not know to issue the "SetProcessorCacheMode" command in the driver to improve performance. This is especially likely to be true in cards that claim to only work with machines later than the early PCI PowerMacs.

Second, the fact that the top PCI card seems to perform better than the lower cards. I've seen this attributed to the top slot being "bus mastering" in many places including Mike Breeden's otherwise excellent XLR8yourmac.com site. This claim is completely wrong. All PCI slots in Macs are "bus mastering". Every single one of them. Most likely, the cause of better performance in the top slot is that the card in the top slot is grabbing the better performance mode mentioned above, and the cards in the lower slot are limited to the poorer PCI commands for data transfers.

A less interesting quirk of the early PCI machines is that they do not support PCI-PCI Bridge chips properly. PCI-PCI Bridge chips are hte chips used to make one PCI slot look like from two to four PCI slots. These are the chips that make dual SCSI cards (Adaptec 3940UW, Atto UL2D, UL3D), FW/USB cards and the Tempo Trio work. The flaw is subtle enough that most of these cards will work. But in the S900 and J700 which already have a bridge chip on the motherboard, putting one of these cards behind the motherboard bridge chip (daisy chaining the PCI-PCI Bridge chips, in effect) causes major problems.

What does the Beige G3 use?

Apple calls it the Grackle. However, it and the chip in the early Blue and Whites is the Motorola MPC106 or XPC106. The 'X' vs 'M' merely denotes how mature the production line was at the time.


It's a pretty good chip, but it has some quirks of its own, such as limiting the RAM to 768 MB.

In Apple's defense, no one was all that good at implementing PCI when they designed the x500 and x600 machines, and the PCI specification may not have been complete at the time they were designing those machines. So, given the context, they did a pretty good job with that chip set. But, it really shows it's age when you try to make it work with modern accessories that expect the PCI implementation to work correctly and work well.

Jeff Walther

--
Unsupported OS X is sponsored by <http://lowendmac.com/>

Support Low End Mac <http://lowendmac.com/lists/support.html>

Unsupported OS X list info <http://lowendmac.com/lists/unsupported.html>
 --> AOL users, remove "mailto:";
Send list messages to:     <mailto:[EMAIL PROTECTED]>
To unsubscribe, email:     <mailto:[EMAIL PROTECTED]>
For digest mode, email:    <mailto:[EMAIL PROTECTED]>
Subscription questions:    <mailto:[EMAIL PROTECTED]>
Archive <http://www.mail-archive.com/unsupportedosx%40mail.maclaunch.com/>

Using a Mac? Free email & more at Applelinks! http://www.applelinks.com



Reply via email to