Hello! What about two Xilinx FPGA chips I have sent config files for - I cannot see them in current source tree? Were they added? If now how can I add them?
The revision 1779 has some build broken: /bin/sh ../../libtool --tag=CC --mode=compile gcc -std=gnu99 -DHAVE_CONFIG_H -I. -I../.. -I../../include/urjtag -I../.. -I../../include -I/usr/local/include -I/usr/local/include -Wall -Wmissing-prototypes -Wstrict-prototypes -Wpointer-arith -Werror -g -O2 -MT ppi.lo -MD -MP -MF .deps/ppi.Tpo -c -o ppi.lo `test -f 'parport/ppi.c' || echo './'`parport/ppi.c libtool: compile: gcc -std=gnu99 -DHAVE_CONFIG_H -I. -I../.. -I../../include/urjtag -I../.. -I../../include -I/usr/local/include -I/usr/local/include -Wall -Wmissing-prototypes -Wstrict-prototypes -Wpointer-arith -Werror -g -O2 -MT ppi.lo -MD -MP -MF .deps/ppi.Tpo -c parport/ppi.c -fPIC -DPIC -o .libs/ppi.o cc1: warnings being treated as errors parport/ppi.c: In function 'ppi_connect': parport/ppi.c:132: warning: return from incompatible pointer type parport/ppi.c: At top level: parport/ppi.c:230: warning: initialization from incompatible pointer type *** Error code 1 Regards, Tomek -- CeDeROM, SQ7MHZ, http://www.tomek.cedro.info ------------------------------------------------------------------------------ Download Intel® Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev _______________________________________________ UrJTAG-development mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/urjtag-development
