This patch was intended to add support for the Digilent, Inc. "nexys4" development board. The nexys4 board contains a Xilinx xc7a100t-csg324 FPGA and an integrated FT2232H chip, so no additional cable should be needed.
But I've been unable to get this to work, and I won't have time to explore further for a while, so I'm pulling this code out of my working tre and sending it along in case anyone else wants to try. I don't recommend its addition to urjtag until someone gets it working. I obtained the following information about the Nexys4 from Digilent, Inc. support, but the actual schematic page containing the FT2232H, surrounding parts, and connection to the FPGA is "proprietary." Channel A of the FT2232 is connected to the JTAG pins of the xilinx part in the usual manner: ADBUS0 TCK ADBUS1 TDI ADBUS2 TDO ADBUS3 TMS In addition, there are tristate buffers between the FT2232H and xilinx that are enabled by setting ADBUS7 to 1. pin ADBUS4 must not be enabled as an output. Note that some other FT2232H based cables used ADBUS4 as an output, so selecting the wrong cable (and forcing the vid/pid) may cause problems. This might be what happened to my board. As usual, the FT2232H with default VID/PID is identified by the linux kernel as a dual serial port, unless the ftdi_sio driver is removed or bumped off of the device by libusb or libftdi. -Steve On Mon, 9 Jun 2014, steve tell wrote: > Has anyone successfully used urjtag to program the xilinx > Artix-7 XC7A100T-1 FPGA on the Nexys-4 board from Digilent, Inc? > http://digilentinc.com/Products/Detail.cfm?NavPath=2,400,1184&Prod=NEXYS4 > > The board contains an FTDI FT2232 chip, which identifies to lsusb as: > > Bus 001 Device 035: ID 0403:6010 Future Technology Devices International, Ltd > FT2232C Dual USB-UART/FIFO IC > > Using "jtag", I can connect with "cable" as follows, but jtag doesn't > detect the FPGA (nor anything else) on the jtag chain: > > jtag> cable FT2232 vid=0x0403 pid=0x6010 > Connected to libftdi driver. > jtag> detect > error: no chain: TDO seems to be stuck at 1 > > > I was hoping to use the svf command to play an svf file from the xilinx > ISE tools into the fpga. > Any hints? > > thanks, > Steve > > > > ------------------------------------------------------------------------------ > HPCC Systems Open Source Big Data Platform from LexisNexis Risk Solutions > Find What Matters Most in Your Big Data with HPCC Systems > Open Source. Fast. Scalable. Simple. Ideal for Dirty Data. > Leverages Graph Analysis for Fast Processing & Easy Data Exploration > http://p.sf.net/sfu/hpccsystems > _______________________________________________ > UrJTAG-development mailing list > UrJTAG-development@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/urjtag-development > ------------------------------------------------------------------------------ Meet PCI DSS 3.0 Compliance Requirements with EventLog Analyzer Achieve PCI DSS 3.0 Compliant Status with Out-of-the-box PCI DSS Reports Are you Audit-Ready for PCI DSS 3.0 Compliance? Download White paper Comply to PCI DSS 3.0 Requirement 10 and 11.5 with EventLog Analyzer http://pubads.g.doubleclick.net/gampad/clk?id=154622311&iu=/4140/ostg.clktrk _______________________________________________ UrJTAG-development mailing list UrJTAG-development@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/urjtag-development
