I find there are clones with FT245+CPLD that runs faster than more recent dirt cheap clones without a CPLD.
If I use this with a STM32F401CE, (errata sheet says broken hardware flow control for the JTAG pins), is it a mismatch? Does that type of USB Blaster use hardware or software flow control? STM32F401CE errata sheet says, "glitches can occur on the SDIOCLK output clock ... Workaround None. Note: Do not use the HW flow control. Overrun errors (Rx mode) and FIFO underrun (Tx mode) should be managed by the application software." ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot _______________________________________________ UrJTAG-development mailing list UrJTAG-development@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/urjtag-development
