Hi,
you might want to use the discrete block "DLR" instead.
first you could convert the PID in s-domain into z domain using the dscr
function in the Scilab, and then use the value in DLR block for hybrid
simulation. make sure the clock u use for the block is same as the sampling
rate in the dscr function.
hope this helps.
rgds,
CL
---- On Mon, 14 Sep 2020 22:13:05 +0800 Steve <[email protected]>
wrote ----
Hello,
I have been facing a problem how to develop a hybrid simulation in the
Scilab/Xcos. The simulation consists of a SISO (single input single output)
system in continuous time domain and a discrete PID controller. The PID
controller is a CBLOCK containing the code in the C programmin language.
Interface between the "analog world" and the "discrete world" consists of
two SAMPLEHOLD blocks. My problem is that I don't know how to achieve a
state when the CBLOCK is calculated in synchronism with the sample and hold
process realized in the SAMPLEHOLD blocks. Can anybody give me an advice or
recommend me some tutorial? Thanks in advance.
--
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