Hi Derek,
so you are basically saying that I should not see any or just little
aliasing?
Best regards,
Fabian Schwartau
Am 15.02.2018 um 17:54 schrieb Derek Kozel:
Hello Fabian,
The set_rx_bandwidth() function does not work with the TwinRX. If the
value returned by get_rx_bandwidth is changing then that is a bug which
I will look into. It is used for the B2xx and E3xx series, as well as
the brand new N310, which have RFICs with programmable bandpass filters.
The TwinRX gets two channels of 100 MS/s complex samples by running the
ADCs at 200 MS/s real value sampling and doing a conversion to half rate
complex with appropriate filtering. Yes, there is a digital frequency
shift of + or - 50 MHz (equivalent to 150 MHz) to bring the final IF to
baseband and correct for mirroring caused by the various mixing
possibilities.
The DDC contains a set of halfband filters and a CIC filter. This is
described in detail in the manual. The DDC will appropriately filter for
its decimation factor.
http://files.ettus.com/manual/page_general.html#general_sampleratenotes
Regards,
Derek
On Thu, Feb 15, 2018 at 1:40 PM, Fabian S. via USRP-users
<usrp-users@lists.ettus.com <mailto:usrp-users@lists.ettus.com>> wrote:
Hi everyone,
I am currently working with the X310 and two TwinRX daugerboards and
have a problem understanding the processing done in the FPGA.
As far as I understood the TwinRX works as a super-het and has the
second (ADC) IF at 150 MHz with 80 MHz bandwidth (according to the
block diagram in the schematics). The ADC of the X310 runs at 200
Msps, so it is working with undersampling I guess?
Now I am missing a block diagram of what is happening in the FPGA.
My guess is that he will mix the ADC signal with a complex sine-wave
so that the 150 MHz will be at zero -> exp(-j*2*pi*150MHz*t). After
that there has to be some sort of filtering and downsampling. But
which exactly? According to the warning message I get depending on
the sample rate I set, I guess there are multiple half-band filters
and an CIC filter which are used in different combinations to get
the required sample rate. Is there somewhere a block diagram and
rules for that?
Now to my main problem: I get a lot of aliasing. For example I have
set my sample rate to 10e6, I can tune my generator several times
the bandwidth above the center frequency and will still see it with
barely any atenuation.
Additionally I noticed setting the RX bandwidth has no effect. Even
if I set it to a very low value (100kHz) at 10Msps, I see no effect.
Do I have to implement the digital filters my own using RFNoC? What
is the set_rx_bandwidth() function good for? I know there are board
which do not support this function but as far as I understood then
the board will report the currently used bandwidth when calling
get_rx_bandwidth() - mine always reports the value I set.
Best regards,
Fabian
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--
--------------------------------------------------
M.-Sc. Fabian Schwartau
Technische Universität Braunschweig
Institut für Hochfrequenztechnik
Schleinitzstr. 22
38106 Braunschweig
Germany
Tel.: +49-(0)531-391-2017
Fax: +49-(0)531-391-2045
Email: fabian.schwar...@ihf.tu-bs.de
WWW: http://www.tu-braunschweig.de/ihf
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