Hi all,
I use usrp X310 with the rfnocnodtool to create new block.
My code include parameter of 24 bits that called phase_step. In the block I
get the parameter as input and write it into register and then i use it in
the code.
My setup in the gnu radio is very simple as follow:
Transmitter (My new RFnoc block) --> throttle -> Sink
I assume that the error is the definition of the parameter of one of my xml
file.
i attach here the 2 xml full file, but i will copy the mail only the
relevant part from the xml file.
the grc xml file is:
*self.$(id).set_arg("phase_step", $phase_step) </make>
<callback>set_arg("phase_step", $phase_step)</callback> <!-- Make one
'param' node for every Parameter you want settable from the GUI.
Sub-nodes: * name * key (makes the value accessible as
$keyname, e.g. in the make node) * type --> <param> <name>Phase
step</name> <key>phase_step</key> <value>0</value>
<type>int</type> </param>*
The fpga src block xml is:
*<?xml version="1.0"?><!--Default XML file--><nocblock>
<name>TXsource</name> <blockname>TXsource</blockname> <ids> <id
revision="0">A8B6127175994722</id> </ids> <!-- Registers -->
<registers> <setreg> <name>PHASE_STEP</name>
<address>128</address> </setreg> </registers> <!-- Args --> <args>
<arg> <name>phase_step</name> <type>int</type>
<value>0</value> <action>SR_WRITE("PHASE_STEP",
$phase_step)</action> </arg> </args> <!--One input, one output. If
this is used, better have all the info the C++ file.--> <ports>
<sink> <name>dump</name> </sink> <source>
<name>src</name> <type>sc16</type> </source> </ports></nocblock>*
When i run the test bench all is work fine, but after i burn the .bit file
and i run thethe gnu radio with my block i get the following error:
*[ERROR] [UHD] Exception caught in safe-call. in virtual
ctrl_iface_impl::~ctrl_iface_impl() at
/home/user/rfnoc/src/uhd/host/lib/rfnoc/ctrl_iface.cpp:76this->peek32(0);
-> EnvironmentError: IOError: Block ctrl (CE_00_Port_30) packet parse error
- EnvironmentError: IOError: Expected SID: 02:30>00:00 Received SID:
02:60>00:00Traceback (most recent call last): File
"/home/user/rfnoc/Radar_proj/Design/top_block.py", line 238, in <module>
main() File "/home/user/rfnoc/Radar_proj/Design/top_block.py", line 226,
in main tb = top_block_cls() File
"/home/user/rfnoc/Radar_proj/Design/top_block.py", line 65, in __init__
self.device3 = variable_uhd_device3_0 = ettus.device3(uhd.device_addr_t(
",".join(('type=x300', "")) )) File
"/home/user/rfnoc/lib/python2.7/dist-packages/ettus/ettus_swig.py", line
1299, in make return _ettus_swig.device3_make(*args,
**kwargs)RuntimeError: EnvironmentError: IOError: Block ctrl
(CE_00_Port_30) packet parse error - EnvironmentError: IOError: Expected
SID: 02:30>00:00 Received SID: 02:60>00:00*
To me it's look that i don't define correct the xml file I try to change
the type of the phase step to real but I get all the time the same error ,
can someone please help me with that.
Thank in advance
Ishai
--
ישי אלוש
054-5823400
//
/*
* Copyright 2018 <+YOU OR YOUR COMPANY+>.
*
* This is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 3, or (at your option)
* any later version.
*
* This software is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this software; see the file COPYING. If not, write to
* the Free Software Foundation, Inc., 51 Franklin Street,
* Boston, MA 02110-1301, USA.
*/
//
module noc_block_TXsource #(
parameter NOC_ID = 64'hA8B6127175994722,
parameter STR_SINK_FIFOSIZE = 11)
(
input bus_clk, input bus_rst,
input ce_clk, input ce_rst,
input [63:0] i_tdata, input i_tlast, input i_tvalid, output i_tready,
output [63:0] o_tdata, output o_tlast, output o_tvalid, input o_tready,
output [63:0] debug
);
////////////////////////////////////////////////////////////
//
// RFNoC Shell
//
////////////////////////////////////////////////////////////
wire [31:0] set_data;
wire [7:0] set_addr;
wire set_stb;
reg [63:0] rb_data;
wire [7:0] rb_addr;
wire [63:0] cmdout_tdata, ackin_tdata;
wire cmdout_tlast, cmdout_tvalid, cmdout_tready, ackin_tlast, ackin_tvalid, ackin_tready;
wire [63:0] str_sink_tdata, str_src_tdata;
wire str_sink_tlast, str_sink_tvalid, str_sink_tready, str_src_tlast, str_src_tvalid, str_src_tready;
wire [15:0] src_sid;
wire [15:0] next_dst_sid, resp_out_dst_sid;
wire [15:0] resp_in_dst_sid;
wire clear_tx_seqnum;
noc_shell #(
.NOC_ID(NOC_ID),
.STR_SINK_FIFOSIZE(STR_SINK_FIFOSIZE))
noc_shell (
.bus_clk(bus_clk), .bus_rst(bus_rst),
.i_tdata(i_tdata), .i_tlast(i_tlast), .i_tvalid(i_tvalid), .i_tready(i_tready),
.o_tdata(o_tdata), .o_tlast(o_tlast), .o_tvalid(o_tvalid), .o_tready(o_tready),
// Computer Engine Clock Domain
.clk(ce_clk), .reset(ce_rst),
// Control Sink
.set_data(set_data), .set_addr(set_addr), .set_stb(set_stb),
.rb_stb(1'b1), .rb_data(rb_data), .rb_addr(rb_addr),
// Control Source
.cmdout_tdata(cmdout_tdata), .cmdout_tlast(cmdout_tlast), .cmdout_tvalid(cmdout_tvalid), .cmdout_tready(cmdout_tready),
.ackin_tdata(ackin_tdata), .ackin_tlast(ackin_tlast), .ackin_tvalid(ackin_tvalid), .ackin_tready(ackin_tready),
// Stream Sink
.str_sink_tdata(str_sink_tdata), .str_sink_tlast(str_sink_tlast), .str_sink_tvalid(str_sink_tvalid), .str_sink_tready(str_sink_tready),
// Stream Source
.str_src_tdata(str_src_tdata), .str_src_tlast(str_src_tlast), .str_src_tvalid(str_src_tvalid), .str_src_tready(str_src_tready),
// Stream IDs set by host
.src_sid(src_sid), // SID of this block
.next_dst_sid(next_dst_sid), // Next destination SID
.resp_in_dst_sid(resp_in_dst_sid), // Response destination SID for input stream responses / errors
.resp_out_dst_sid(resp_out_dst_sid), // Response destination SID for output stream responses / errors
// Misc
.vita_time('d0), .clear_tx_seqnum(clear_tx_seqnum),
.debug(debug));
// Null sink
assign str_sink_tready = 1'b1;
// Control Source Unused
assign cmdout_tdata = 64'd0;
assign cmdout_tlast = 1'b0;
assign cmdout_tvalid = 1'b0;
assign ackin_tready = 1'b1;
////////////////////////////////////////////////////////////
//
// AXI Wrapper
// Convert RFNoC Shell interface into AXI stream interface
//
////////////////////////////////////////////////////////////
/* wire [31:0] m_axis_data_tdata;
wire m_axis_data_tlast;
wire m_axis_data_tvalid;
wire m_axis_data_tready; */
wire [31:0] s_axis_data_tdata;
wire [127:0] s_axis_data_tuser;
wire s_axis_data_tlast;
wire s_axis_data_tvalid;
wire s_axis_data_tready;
wire s_axis_data_tvalid_int;
wire s_axis_data_tready_int;
wire enable;
wire [15:0] payload_length;
axi_wrapper #(
.SIMPLE_MODE(0),
.RESIZE_OUTPUT_PACKET(1))
axi_wrapper (
.clk(ce_clk), .reset(ce_rst),
.clear_tx_seqnum(clear_tx_seqnum),
.next_dst(next_dst_sid),
.set_stb(set_stb), .set_addr(set_addr), .set_data(set_data),
.i_tdata(), .i_tlast(), .i_tvalid(), .i_tready(),
.o_tdata(str_src_tdata), .o_tlast(str_src_tlast), .o_tvalid(str_src_tvalid), .o_tready(str_src_tready),
.m_axis_data_tdata(),
.m_axis_data_tlast(),
.m_axis_data_tvalid(),
.m_axis_data_tready(1'b1),
.m_axis_data_tuser(),
.s_axis_data_tdata(s_axis_data_tdata),
.s_axis_data_tlast(/* Not needed due to RESIZE_OUTPUT_PACKET = 1 */),
.s_axis_data_tvalid(s_axis_data_tvalid),
.s_axis_data_tready(s_axis_data_tready),
.s_axis_data_tuser(s_axis_data_tuser),
.m_axis_config_tdata(),
.m_axis_config_tlast(),
.m_axis_config_tvalid(),
.m_axis_config_tready(),
.m_axis_pkt_len_tdata(),
.m_axis_pkt_len_tvalid(),
.m_axis_pkt_len_tready());
////////////////////////////////////////////////////////////
//
// User code
//
////////////////////////////////////////////////////////////
// NoC Shell registers 0 - 127,
// User register address space starts at 128
// localparam SR_USER_REG_BASE = 128; change to comment use basic test bench only
// rgister parameter
// paramter for accumalator size
parameter acclen = 24; // input len
parameter accScale = 10; // the MSB bits
wire [2:0] pri_mode;
wire [acclen-1:0] phase_step;
assign phase_step = 24'd3355544;
localparam SR_ENABLE = 132;
localparam SR_PKT_SIZE = 140;
localparam SR_PHASE_STEP = 128;
localparam SR_PRI_MODE = 130;
cvita_hdr_encoder cvita_hdr_encoder (
.pkt_type(2'd0), .eob(1'b0), .has_time(1'b0),
.seqnum(12'd0), .payload_length(payload_length), .dst_sid(next_dst_sid), .src_sid(src_sid),
.vita_time(64'd0),
.header(s_axis_data_tuser));
// Set packet size
setting_reg #(
.my_addr(SR_PKT_SIZE), .awidth(8), .width(16),
.at_reset(4)) // Set a safe default packet size in case packet size is never set
set_payload_length (
.clk(ce_clk), .rst(ce_rst),
.strobe(set_stb), .addr(set_addr), .in(set_data),
.out(payload_length), .changed());
//Start/stop functionality
//settings bus for start/stop
setting_reg #(
.my_addr(SR_ENABLE), .awidth(8), .width(1), .at_reset(0))
set_enable (
.clk(ce_clk), .rst(ce_rst),
.strobe(set_stb), .addr(set_addr), .in(set_data),
.out(enable), .changed());
// Set phase step
/* setting_reg #(
.my_addr(SR_PHASE_STEP), .awidth(8), .width(acclen))
set_phase_step (
.clk(ce_clk), .rst(ce_rst),
.strobe(set_stb), .addr(set_addr), .in(set_data),
.out(phase_step), .changed()); */
// Set PRI mode
setting_reg #(
.my_addr(SR_PRI_MODE), .awidth(8), .width(3))
set_pri_mode (
.clk(ce_clk), .rst(ce_rst),
.strobe(set_stb), .addr(set_addr), .in(set_data),
.out(pri_mode), .changed());
// Enable logic
assign s_axis_data_tvalid = s_axis_data_tvalid_int & enable;
assign s_axis_data_tready_int = s_axis_data_tready & enable;
// Settings registers
//
// - The settings register bus is a simple strobed interface.
// - Transactions include both a write and a readback.
// - The write occurs when set_stb is asserted.
// The settings register with the address matching set_addr will
// be loaded with the data on set_data.
// - Readback occurs when rb_stb is asserted. The read back strobe
// must assert at least one clock cycle after set_stb asserts /
// rb_stb is ignored if asserted on the same clock cycle of set_stb.
// Example valid and invalid timing:
// __ __ __ __
// clk __| |__| |__| |__| |__
// _____
// set_stb ___| |________________
// _____
// rb_stb _________| |__________ (Valid)
// _____
// rb_stb _______________| |____ (Valid)
// __________________________
// rb_stb (Valid if readback data is a constant)
// _____
// rb_stb ___| |________________ (Invalid / ignored, same cycle as set_stb)
//
// This part is only for test bench to check register.
// In this script we write and read from another register.
/* localparam [7:0] SR_TEST_REG_0 = SR_USER_REG_BASE;
localparam [7:0] SR_TEST_REG_1 = SR_USER_REG_BASE + 8'd1;
wire [31:0] test_reg_0;
setting_reg #(
.my_addr(SR_TEST_REG_0), .awidth(8), .width(32))
sr_test_reg_0 (
.clk(ce_clk), .rst(ce_rst),
.strobe(set_stb), .addr(set_addr), .in(set_data), .out(test_reg_0), .changed());
wire [31:0] test_reg_1;
setting_reg #(
.my_addr(SR_TEST_REG_1), .awidth(8), .width(32))
sr_test_reg_1 (
.clk(ce_clk), .rst(ce_rst),
.strobe(set_stb), .addr(set_addr), .in(set_data), .out(test_reg_1), .changed());
// Readback registers
// rb_stb set to 1'b1 on NoC Shell
always @(posedge ce_clk) begin
case(rb_addr)
8'd0 : rb_data <= {32'd0, test_reg_0};
8'd1 : rb_data <= {32'd0, test_reg_1};
default : rb_data <= 64'h0BADC0DE0BADC0DE;
endcase
end */
//////////////////////////////////////////////////// M Y C O D E ////////////////////////////////////////////////////////
// sin signals
parameter TableDep = 1024;
reg [31:0] Sin_table [0:TableDep-1];
reg [31:0] Sin_output;
reg [accScale-1:0] Sin_pointer; // pointer to the position in Sin_table only the size of the sin table.
reg [acclen-1:0] Sin_skip; // results of the index of the sin table before sliced
reg carry; // one bit for carry
// state machine parameter
parameter SM_size = 3;
parameter IDLE = 3'b000, BETCH_0 = 3'b001, BETCH_1 = 3'b010, BETCH_2 = 3'b011, BETCH_3 = 3'b100, CW_STATE = 3'b101;
parameter betch_len_0 = 8'd2, betch_len_1 = 8'd2, betch_len_2 = 8'd2, betch_len_3 = 8'd2 , betch_len_CW = 8'd2;
parameter phase_step_0 = 24'd335544, phase_step_1 = 24'd671088, phase_step_2 = 24'd1342176, phase_step_3 = 24'd2684352 , phase_step_CW = 24'd167772;
// phase_step_0 = 4M, phase_step_1 = 8M, phase_step_2 = 16M, phase_step_3 = 32M, CW = 2M
parameter PRI_mode_BETCH0 = 3'b000, PRI_mode_BETCH1 = 3'b001, PRI_mode_BETCH2 = 3'b010, PRI_mode_BETCH3 = 3'b011, PRI_mode_SM = 3'b100, PRI_mode_CW = 3'b101;
reg [SM_size-1:0] state;
reg [7:0] betch_counter;
reg start_betch;
reg output_interrupt;
reg output_enable;
reg [acclen-1:0] phase_step_reg;
reg PRI_mode_iterrupt;
reg SM_seq_en;
// Fifo signals
wire [31:0] pipe_in_tdata;
wire pipe_in_tvalid, pipe_in_tlast;
wire pipe_in_tready;
wire pipe_out_tlast;
// parameters for PW and PRI value
parameter PW_len_0 = 16'd50 , PW_len_1 = 16'd50, PW_len_2 = 16'd100, PW_len_3 = 16'd200, PW_len_CW = 16'd50;
parameter PRI_len_0 = 16'd100, PRI_len_1 = 16'd200, PRI_len_2 = 16'd200, PRI_len_3 = 16'd300, PRI_len_CW = 16'd50;
// PW and PRI signals
reg CW_flag;
reg [15:0] PW_len;
reg [15:0] PRI_len;
reg [15:0] PRI_counter;
reg start_PW; // output
reg end_PW; // output
reg data_valid;
reg PW_output;
reg end_PRI; // internal signal to the state machine to count number of betch
reg [2:0] PRI_mode_reg;
reg [2:0] PRI_mode_reg_D;
// initialization
initial begin
// PRI signals
CW_flag = 0;
PRI_counter = 0;
PW_len = 0;
PRI_len = 0;
start_PW = 0;
end_PW = 0;
PW_output = 0;
data_valid = 0;
end_PRI = 0;
// state machine signals
state = IDLE;
betch_counter = 0;
start_betch = 0;
output_interrupt = 0;
output_enable = 0;
PRI_mode_iterrupt = 0;
PRI_mode_reg = 0;
PRI_mode_reg_D = 0;
SM_seq_en = 0;
phase_step_reg = 0;
// phase_step_reg = 0;
// sin signals
carry = 0;
Sin_pointer = 0;
Sin_skip = 0;
Sin_output = 0;
Sin_table[0] = {16'd0,16'd2047}; Sin_table[1] = {16'd13,16'd2047}; Sin_table[2] = {16'd25,16'd2047}; Sin_table[3] = {16'd38,16'd2047}; Sin_table[4] = {16'd50,16'd2047}; Sin_table[5] = {16'd63,16'd2047}; Sin_table[6] = {16'd75,16'd2047}; Sin_table[7] = {16'd88,16'd2046}; Sin_table[8] = {16'd100,16'd2046}; Sin_table[9] = {16'd113,16'd2045}; Sin_table[10] = {16'd126,16'd2044}; Sin_table[11] = {16'd138,16'd2043}; Sin_table[12] = {16'd151,16'd2042}; Sin_table[13] = {16'd163,16'd2041}; Sin_table[14] = {16'd176,16'd2040}; Sin_table[15] = {16'd188,16'd2039}; Sin_table[16] = {16'd201,16'd2038}; Sin_table[17] = {16'd213,16'd2037}; Sin_table[18] = {16'd226,16'd2036}; Sin_table[19] = {16'd238,16'd2034}; Sin_table[20] = {16'd251,16'd2033}; Sin_table[21] = {16'd263,16'd2031}; Sin_table[22] = {16'd276,16'd2029}; Sin_table[23] = {16'd288,16'd2028}; Sin_table[24] = {16'd301,16'd2026}; Sin_table[25] = {16'd313,16'd2024}; Sin_table[26] = {16'd325,16'd2022}; Sin_table[27] = {16'd338,16'd2020}; Sin_table[28] = {16'd350,16'd2018}; Sin_table[29] = {16'd363,16'd2016}; Sin_table[30] = {16'd375,16'd2013}; Sin_table[31] = {16'd387,16'd2011}; Sin_table[32] = {16'd400,16'd2009}; Sin_table[33] = {16'd412,16'd2006}; Sin_table[34] = {16'd424,16'd2004}; Sin_table[35] = {16'd436,16'd2001}; Sin_table[36] = {16'd449,16'd1998}; Sin_table[37] = {16'd461,16'd1995}; Sin_table[38] = {16'd473,16'd1993}; Sin_table[39] = {16'd485,16'd1990}; Sin_table[40] = {16'd498,16'd1987}; Sin_table[41] = {16'd510,16'd1984}; Sin_table[42] = {16'd522,16'd1980}; Sin_table[43] = {16'd534,16'd1977}; Sin_table[44] = {16'd546,16'd1974}; Sin_table[45] = {16'd558,16'd1970}; Sin_table[46] = {16'd570,16'd1967}; Sin_table[47] = {16'd582,16'd1963}; Sin_table[48] = {16'd595,16'd1960}; Sin_table[49] = {16'd607,16'd1956}; Sin_table[50] = {16'd619,16'd1952}; Sin_table[51] = {16'd630,16'd1949}; Sin_table[52] = {16'd642,16'd1945}; Sin_table[53] = {16'd654,16'd1941}; Sin_table[54] = {16'd666,16'd1937}; Sin_table[55] = {16'd678,16'd1932}; Sin_table[56] = {16'd690,16'd1928}; Sin_table[57] = {16'd702,16'd1924}; Sin_table[58] = {16'd714,16'd1920}; Sin_table[59] = {16'd725,16'd1915}; Sin_table[60] = {16'd737,16'd1911}; Sin_table[61] = {16'd749,16'd1906}; Sin_table[62] = {16'd760,16'd1902}; Sin_table[63] = {16'd772,16'd1897}; Sin_table[64] = {16'd784,16'd1892}; Sin_table[65] = {16'd795,16'd1887}; Sin_table[66] = {16'd807,16'd1882}; Sin_table[67] = {16'd818,16'd1877}; Sin_table[68] = {16'd830,16'd1872}; Sin_table[69] = {16'd841,16'd1867}; Sin_table[70] = {16'd853,16'd1862}; Sin_table[71] = {16'd864,16'd1857}; Sin_table[72] = {16'd876,16'd1851}; Sin_table[73] = {16'd887,16'd1846}; Sin_table[74] = {16'd898,16'd1840}; Sin_table[75] = {16'd910,16'd1835}; Sin_table[76] = {16'd921,16'd1829}; Sin_table[77] = {16'd932,16'd1824}; Sin_table[78] = {16'd943,16'd1818}; Sin_table[79] = {16'd954,16'd1812}; Sin_table[80] = {16'd965,16'd1806}; Sin_table[81] = {16'd976,16'd1800}; Sin_table[82] = {16'd988,16'd1794}; Sin_table[83] = {16'd999,16'd1788}; Sin_table[84] = {16'd1009,16'd1782}; Sin_table[85] = {16'd1020,16'd1776}; Sin_table[86] = {16'd1031,16'd1769}; Sin_table[87] = {16'd1042,16'd1763}; Sin_table[88] = {16'd1053,16'd1757}; Sin_table[89] = {16'd1064,16'd1750}; Sin_table[90] = {16'd1074,16'd1744}; Sin_table[91] = {16'd1085,16'd1737}; Sin_table[92] = {16'd1096,16'd1730}; Sin_table[93] = {16'd1106,16'd1724}; Sin_table[94] = {16'd1117,16'd1717}; Sin_table[95] = {16'd1127,16'd1710}; Sin_table[96] = {16'd1138,16'd1703}; Sin_table[97] = {16'd1148,16'd1696}; Sin_table[98] = {16'd1159,16'd1689}; Sin_table[99] = {16'd1169,16'd1682}; Sin_table[100] = {16'd1179,16'd1674}; Sin_table[101] = {16'd1190,16'd1667}; Sin_table[102] = {16'd1200,16'd1660}; Sin_table[103] = {16'd1210,16'd1652}; Sin_table[104] = {16'd1220,16'd1645}; Sin_table[105] = {16'd1230,16'd1637}; Sin_table[106] = {16'd1240,16'd1630}; Sin_table[107] = {16'd1250,16'd1622}; Sin_table[108] = {16'd1260,16'd1615}; Sin_table[109] = {16'd1270,16'd1607}; Sin_table[110] = {16'd1280,16'd1599}; Sin_table[111] = {16'd1289,16'd1591}; Sin_table[112] = {16'd1299,16'd1583}; Sin_table[113] = {16'd1309,16'd1575}; Sin_table[114] = {16'd1319,16'd1567}; Sin_table[115] = {16'd1328,16'd1559}; Sin_table[116] = {16'd1338,16'd1551}; Sin_table[117] = {16'd1347,16'd1543}; Sin_table[118] = {16'd1357,16'd1534}; Sin_table[119] = {16'd1366,16'd1526}; Sin_table[120] = {16'd1375,16'd1517}; Sin_table[121] = {16'd1385,16'd1509}; Sin_table[122] = {16'd1394,16'd1500}; Sin_table[123] = {16'd1403,16'd1492}; Sin_table[124] = {16'd1412,16'd1483}; Sin_table[125] = {16'd1421,16'd1475}; Sin_table[126] = {16'd1430,16'd1466}; Sin_table[127] = {16'd1439,16'd1457}; Sin_table[128] = {16'd1448,16'd1448}; Sin_table[129] = {16'd1457,16'd1439}; Sin_table[130] = {16'd1466,16'd1430}; Sin_table[131] = {16'd1475,16'd1421}; Sin_table[132] = {16'd1483,16'd1412}; Sin_table[133] = {16'd1492,16'd1403}; Sin_table[134] = {16'd1500,16'd1394}; Sin_table[135] = {16'd1509,16'd1385}; Sin_table[136] = {16'd1517,16'd1375}; Sin_table[137] = {16'd1526,16'd1366}; Sin_table[138] = {16'd1534,16'd1357}; Sin_table[139] = {16'd1543,16'd1347}; Sin_table[140] = {16'd1551,16'd1338}; Sin_table[141] = {16'd1559,16'd1328}; Sin_table[142] = {16'd1567,16'd1319}; Sin_table[143] = {16'd1575,16'd1309}; Sin_table[144] = {16'd1583,16'd1299}; Sin_table[145] = {16'd1591,16'd1289}; Sin_table[146] = {16'd1599,16'd1280}; Sin_table[147] = {16'd1607,16'd1270}; Sin_table[148] = {16'd1615,16'd1260}; Sin_table[149] = {16'd1622,16'd1250}; Sin_table[150] = {16'd1630,16'd1240}; Sin_table[151] = {16'd1637,16'd1230}; Sin_table[152] = {16'd1645,16'd1220}; Sin_table[153] = {16'd1652,16'd1210}; Sin_table[154] = {16'd1660,16'd1200}; Sin_table[155] = {16'd1667,16'd1190}; Sin_table[156] = {16'd1674,16'd1179}; Sin_table[157] = {16'd1682,16'd1169}; Sin_table[158] = {16'd1689,16'd1159}; Sin_table[159] = {16'd1696,16'd1148}; Sin_table[160] = {16'd1703,16'd1138}; Sin_table[161] = {16'd1710,16'd1127}; Sin_table[162] = {16'd1717,16'd1117}; Sin_table[163] = {16'd1724,16'd1106}; Sin_table[164] = {16'd1730,16'd1096}; Sin_table[165] = {16'd1737,16'd1085}; Sin_table[166] = {16'd1744,16'd1074}; Sin_table[167] = {16'd1750,16'd1064}; Sin_table[168] = {16'd1757,16'd1053}; Sin_table[169] = {16'd1763,16'd1042}; Sin_table[170] = {16'd1769,16'd1031}; Sin_table[171] = {16'd1776,16'd1020}; Sin_table[172] = {16'd1782,16'd1009}; Sin_table[173] = {16'd1788,16'd999}; Sin_table[174] = {16'd1794,16'd988}; Sin_table[175] = {16'd1800,16'd976}; Sin_table[176] = {16'd1806,16'd965}; Sin_table[177] = {16'd1812,16'd954}; Sin_table[178] = {16'd1818,16'd943}; Sin_table[179] = {16'd1824,16'd932}; Sin_table[180] = {16'd1829,16'd921}; Sin_table[181] = {16'd1835,16'd910}; Sin_table[182] = {16'd1840,16'd898}; Sin_table[183] = {16'd1846,16'd887}; Sin_table[184] = {16'd1851,16'd876}; Sin_table[185] = {16'd1857,16'd864}; Sin_table[186] = {16'd1862,16'd853}; Sin_table[187] = {16'd1867,16'd841}; Sin_table[188] = {16'd1872,16'd830}; Sin_table[189] = {16'd1877,16'd818}; Sin_table[190] = {16'd1882,16'd807}; Sin_table[191] = {16'd1887,16'd795}; Sin_table[192] = {16'd1892,16'd784}; Sin_table[193] = {16'd1897,16'd772}; Sin_table[194] = {16'd1902,16'd760}; Sin_table[195] = {16'd1906,16'd749}; Sin_table[196] = {16'd1911,16'd737}; Sin_table[197] = {16'd1915,16'd725}; Sin_table[198] = {16'd1920,16'd714}; Sin_table[199] = {16'd1924,16'd702}; Sin_table[200] = {16'd1928,16'd690}; Sin_table[201] = {16'd1932,16'd678}; Sin_table[202] = {16'd1937,16'd666}; Sin_table[203] = {16'd1941,16'd654}; Sin_table[204] = {16'd1945,16'd642}; Sin_table[205] = {16'd1949,16'd630}; Sin_table[206] = {16'd1952,16'd619}; Sin_table[207] = {16'd1956,16'd607}; Sin_table[208] = {16'd1960,16'd595}; Sin_table[209] = {16'd1963,16'd582}; Sin_table[210] = {16'd1967,16'd570}; Sin_table[211] = {16'd1970,16'd558}; Sin_table[212] = {16'd1974,16'd546}; Sin_table[213] = {16'd1977,16'd534}; Sin_table[214] = {16'd1980,16'd522}; Sin_table[215] = {16'd1984,16'd510}; Sin_table[216] = {16'd1987,16'd498}; Sin_table[217] = {16'd1990,16'd485}; Sin_table[218] = {16'd1993,16'd473}; Sin_table[219] = {16'd1995,16'd461}; Sin_table[220] = {16'd1998,16'd449}; Sin_table[221] = {16'd2001,16'd436}; Sin_table[222] = {16'd2004,16'd424}; Sin_table[223] = {16'd2006,16'd412}; Sin_table[224] = {16'd2009,16'd400}; Sin_table[225] = {16'd2011,16'd387}; Sin_table[226] = {16'd2013,16'd375}; Sin_table[227] = {16'd2016,16'd363}; Sin_table[228] = {16'd2018,16'd350}; Sin_table[229] = {16'd2020,16'd338}; Sin_table[230] = {16'd2022,16'd325}; Sin_table[231] = {16'd2024,16'd313}; Sin_table[232] = {16'd2026,16'd301}; Sin_table[233] = {16'd2028,16'd288}; Sin_table[234] = {16'd2029,16'd276}; Sin_table[235] = {16'd2031,16'd263}; Sin_table[236] = {16'd2033,16'd251}; Sin_table[237] = {16'd2034,16'd238}; Sin_table[238] = {16'd2036,16'd226}; Sin_table[239] = {16'd2037,16'd213}; Sin_table[240] = {16'd2038,16'd201}; Sin_table[241] = {16'd2039,16'd188}; Sin_table[242] = {16'd2040,16'd176}; Sin_table[243] = {16'd2041,16'd163}; Sin_table[244] = {16'd2042,16'd151}; Sin_table[245] = {16'd2043,16'd138}; Sin_table[246] = {16'd2044,16'd126}; Sin_table[247] = {16'd2045,16'd113}; Sin_table[248] = {16'd2046,16'd100}; Sin_table[249] = {16'd2046,16'd88}; Sin_table[250] = {16'd2047,16'd75}; Sin_table[251] = {16'd2047,16'd63}; Sin_table[252] = {16'd2047,16'd50}; Sin_table[253] = {16'd2047,16'd38}; Sin_table[254] = {16'd2047,16'd25}; Sin_table[255] = {16'd2047,16'd13}; Sin_table[256] = {16'd2047,16'd0}; Sin_table[257] = {16'd2047,-16'd13}; Sin_table[258] = {16'd2047,-16'd25}; Sin_table[259] = {16'd2047,-16'd38}; Sin_table[260] = {16'd2047,-16'd50}; Sin_table[261] = {16'd2047,-16'd63}; Sin_table[262] = {16'd2047,-16'd75}; Sin_table[263] = {16'd2046,-16'd88}; Sin_table[264] = {16'd2046,-16'd100}; Sin_table[265] = {16'd2045,-16'd113}; Sin_table[266] = {16'd2044,-16'd126}; Sin_table[267] = {16'd2043,-16'd138}; Sin_table[268] = {16'd2042,-16'd151}; Sin_table[269] = {16'd2041,-16'd163}; Sin_table[270] = {16'd2040,-16'd176}; Sin_table[271] = {16'd2039,-16'd188}; Sin_table[272] = {16'd2038,-16'd201}; Sin_table[273] = {16'd2037,-16'd213}; Sin_table[274] = {16'd2036,-16'd226}; Sin_table[275] = {16'd2034,-16'd238}; Sin_table[276] = {16'd2033,-16'd251}; Sin_table[277] = {16'd2031,-16'd263}; Sin_table[278] = {16'd2029,-16'd276}; Sin_table[279] = {16'd2028,-16'd288}; Sin_table[280] = {16'd2026,-16'd301}; Sin_table[281] = {16'd2024,-16'd313}; Sin_table[282] = {16'd2022,-16'd325}; Sin_table[283] = {16'd2020,-16'd338}; Sin_table[284] = {16'd2018,-16'd350}; Sin_table[285] = {16'd2016,-16'd363}; Sin_table[286] = {16'd2013,-16'd375}; Sin_table[287] = {16'd2011,-16'd387}; Sin_table[288] = {16'd2009,-16'd400}; Sin_table[289] = {16'd2006,-16'd412}; Sin_table[290] = {16'd2004,-16'd424}; Sin_table[291] = {16'd2001,-16'd436}; Sin_table[292] = {16'd1998,-16'd449}; Sin_table[293] = {16'd1995,-16'd461}; Sin_table[294] = {16'd1993,-16'd473}; Sin_table[295] = {16'd1990,-16'd485}; Sin_table[296] = {16'd1987,-16'd498}; Sin_table[297] = {16'd1984,-16'd510}; Sin_table[298] = {16'd1980,-16'd522}; Sin_table[299] = {16'd1977,-16'd534}; Sin_table[300] = {16'd1974,-16'd546}; Sin_table[301] = {16'd1970,-16'd558}; Sin_table[302] = {16'd1967,-16'd570}; Sin_table[303] = {16'd1963,-16'd582}; Sin_table[304] = {16'd1960,-16'd595}; Sin_table[305] = {16'd1956,-16'd607}; Sin_table[306] = {16'd1952,-16'd619}; Sin_table[307] = {16'd1949,-16'd630}; Sin_table[308] = {16'd1945,-16'd642}; Sin_table[309] = {16'd1941,-16'd654}; Sin_table[310] = {16'd1937,-16'd666}; Sin_table[311] = {16'd1932,-16'd678}; Sin_table[312] = {16'd1928,-16'd690}; Sin_table[313] = {16'd1924,-16'd702}; Sin_table[314] = {16'd1920,-16'd714}; Sin_table[315] = {16'd1915,-16'd725}; Sin_table[316] = {16'd1911,-16'd737}; Sin_table[317] = {16'd1906,-16'd749}; Sin_table[318] = {16'd1902,-16'd760}; Sin_table[319] = {16'd1897,-16'd772}; Sin_table[320] = {16'd1892,-16'd784}; Sin_table[321] = {16'd1887,-16'd795}; Sin_table[322] = {16'd1882,-16'd807}; Sin_table[323] = {16'd1877,-16'd818}; Sin_table[324] = {16'd1872,-16'd830}; Sin_table[325] = {16'd1867,-16'd841}; Sin_table[326] = {16'd1862,-16'd853}; Sin_table[327] = {16'd1857,-16'd864}; Sin_table[328] = {16'd1851,-16'd876}; Sin_table[329] = {16'd1846,-16'd887}; Sin_table[330] = {16'd1840,-16'd898}; Sin_table[331] = {16'd1835,-16'd910}; Sin_table[332] = {16'd1829,-16'd921}; Sin_table[333] = {16'd1824,-16'd932}; Sin_table[334] = {16'd1818,-16'd943}; Sin_table[335] = {16'd1812,-16'd954}; Sin_table[336] = {16'd1806,-16'd965}; Sin_table[337] = {16'd1800,-16'd976}; Sin_table[338] = {16'd1794,-16'd988}; Sin_table[339] = {16'd1788,-16'd999}; Sin_table[340] = {16'd1782,-16'd1009}; Sin_table[341] = {16'd1776,-16'd1020}; Sin_table[342] = {16'd1769,-16'd1031}; Sin_table[343] = {16'd1763,-16'd1042}; Sin_table[344] = {16'd1757,-16'd1053}; Sin_table[345] = {16'd1750,-16'd1064}; Sin_table[346] = {16'd1744,-16'd1074}; Sin_table[347] = {16'd1737,-16'd1085}; Sin_table[348] = {16'd1730,-16'd1096}; Sin_table[349] = {16'd1724,-16'd1106}; Sin_table[350] = {16'd1717,-16'd1117}; Sin_table[351] = {16'd1710,-16'd1127}; Sin_table[352] = {16'd1703,-16'd1138}; Sin_table[353] = {16'd1696,-16'd1148}; Sin_table[354] = {16'd1689,-16'd1159}; Sin_table[355] = {16'd1682,-16'd1169}; Sin_table[356] = {16'd1674,-16'd1179}; Sin_table[357] = {16'd1667,-16'd1190}; Sin_table[358] = {16'd1660,-16'd1200}; Sin_table[359] = {16'd1652,-16'd1210}; Sin_table[360] = {16'd1645,-16'd1220}; Sin_table[361] = {16'd1637,-16'd1230}; Sin_table[362] = {16'd1630,-16'd1240}; Sin_table[363] = {16'd1622,-16'd1250}; Sin_table[364] = {16'd1615,-16'd1260}; Sin_table[365] = {16'd1607,-16'd1270}; Sin_table[366] = {16'd1599,-16'd1280}; Sin_table[367] = {16'd1591,-16'd1289}; Sin_table[368] = {16'd1583,-16'd1299}; Sin_table[369] = {16'd1575,-16'd1309}; Sin_table[370] = {16'd1567,-16'd1319}; Sin_table[371] = {16'd1559,-16'd1328}; Sin_table[372] = {16'd1551,-16'd1338}; Sin_table[373] = {16'd1543,-16'd1347}; Sin_table[374] = {16'd1534,-16'd1357}; Sin_table[375] = {16'd1526,-16'd1366}; Sin_table[376] = {16'd1517,-16'd1375}; Sin_table[377] = {16'd1509,-16'd1385}; Sin_table[378] = {16'd1500,-16'd1394}; Sin_table[379] = {16'd1492,-16'd1403}; Sin_table[380] = {16'd1483,-16'd1412}; Sin_table[381] = {16'd1475,-16'd1421}; Sin_table[382] = {16'd1466,-16'd1430}; Sin_table[383] = {16'd1457,-16'd1439}; Sin_table[384] = {16'd1448,-16'd1448}; Sin_table[385] = {16'd1439,-16'd1457}; Sin_table[386] = {16'd1430,-16'd1466}; Sin_table[387] = {16'd1421,-16'd1475}; Sin_table[388] = {16'd1412,-16'd1483}; Sin_table[389] = {16'd1403,-16'd1492}; Sin_table[390] = {16'd1394,-16'd1500}; Sin_table[391] = {16'd1385,-16'd1509}; Sin_table[392] = {16'd1375,-16'd1517}; Sin_table[393] = {16'd1366,-16'd1526}; Sin_table[394] = {16'd1357,-16'd1534}; Sin_table[395] = {16'd1347,-16'd1543}; Sin_table[396] = {16'd1338,-16'd1551}; Sin_table[397] = {16'd1328,-16'd1559}; Sin_table[398] = {16'd1319,-16'd1567}; Sin_table[399] = {16'd1309,-16'd1575}; Sin_table[400] = {16'd1299,-16'd1583}; Sin_table[401] = {16'd1289,-16'd1591}; Sin_table[402] = {16'd1280,-16'd1599}; Sin_table[403] = {16'd1270,-16'd1607}; Sin_table[404] = {16'd1260,-16'd1615}; Sin_table[405] = {16'd1250,-16'd1622}; Sin_table[406] = {16'd1240,-16'd1630}; Sin_table[407] = {16'd1230,-16'd1637}; Sin_table[408] = {16'd1220,-16'd1645}; Sin_table[409] = {16'd1210,-16'd1652}; Sin_table[410] = {16'd1200,-16'd1660}; Sin_table[411] = {16'd1190,-16'd1667}; Sin_table[412] = {16'd1179,-16'd1674}; Sin_table[413] = {16'd1169,-16'd1682}; Sin_table[414] = {16'd1159,-16'd1689}; Sin_table[415] = {16'd1148,-16'd1696}; Sin_table[416] = {16'd1138,-16'd1703}; Sin_table[417] = {16'd1127,-16'd1710}; Sin_table[418] = {16'd1117,-16'd1717}; Sin_table[419] = {16'd1106,-16'd1724}; Sin_table[420] = {16'd1096,-16'd1730}; Sin_table[421] = {16'd1085,-16'd1737}; Sin_table[422] = {16'd1074,-16'd1744}; Sin_table[423] = {16'd1064,-16'd1750}; Sin_table[424] = {16'd1053,-16'd1757}; Sin_table[425] = {16'd1042,-16'd1763}; Sin_table[426] = {16'd1031,-16'd1769}; Sin_table[427] = {16'd1020,-16'd1776}; Sin_table[428] = {16'd1009,-16'd1782}; Sin_table[429] = {16'd999,-16'd1788}; Sin_table[430] = {16'd988,-16'd1794}; Sin_table[431] = {16'd976,-16'd1800}; Sin_table[432] = {16'd965,-16'd1806}; Sin_table[433] = {16'd954,-16'd1812}; Sin_table[434] = {16'd943,-16'd1818}; Sin_table[435] = {16'd932,-16'd1824}; Sin_table[436] = {16'd921,-16'd1829}; Sin_table[437] = {16'd910,-16'd1835}; Sin_table[438] = {16'd898,-16'd1840}; Sin_table[439] = {16'd887,-16'd1846}; Sin_table[440] = {16'd876,-16'd1851}; Sin_table[441] = {16'd864,-16'd1857}; Sin_table[442] = {16'd853,-16'd1862}; Sin_table[443] = {16'd841,-16'd1867}; Sin_table[444] = {16'd830,-16'd1872}; Sin_table[445] = {16'd818,-16'd1877}; Sin_table[446] = {16'd807,-16'd1882}; Sin_table[447] = {16'd795,-16'd1887}; Sin_table[448] = {16'd784,-16'd1892}; Sin_table[449] = {16'd772,-16'd1897}; Sin_table[450] = {16'd760,-16'd1902}; Sin_table[451] = {16'd749,-16'd1906}; Sin_table[452] = {16'd737,-16'd1911}; Sin_table[453] = {16'd725,-16'd1915}; Sin_table[454] = {16'd714,-16'd1920}; Sin_table[455] = {16'd702,-16'd1924}; Sin_table[456] = {16'd690,-16'd1928}; Sin_table[457] = {16'd678,-16'd1932}; Sin_table[458] = {16'd666,-16'd1937}; Sin_table[459] = {16'd654,-16'd1941}; Sin_table[460] = {16'd642,-16'd1945}; Sin_table[461] = {16'd630,-16'd1949}; Sin_table[462] = {16'd619,-16'd1952}; Sin_table[463] = {16'd607,-16'd1956}; Sin_table[464] = {16'd595,-16'd1960}; Sin_table[465] = {16'd582,-16'd1963}; Sin_table[466] = {16'd570,-16'd1967}; Sin_table[467] = {16'd558,-16'd1970}; Sin_table[468] = {16'd546,-16'd1974}; Sin_table[469] = {16'd534,-16'd1977}; Sin_table[470] = {16'd522,-16'd1980}; Sin_table[471] = {16'd510,-16'd1984}; Sin_table[472] = {16'd498,-16'd1987}; Sin_table[473] = {16'd485,-16'd1990}; Sin_table[474] = {16'd473,-16'd1993}; Sin_table[475] = {16'd461,-16'd1995}; Sin_table[476] = {16'd449,-16'd1998}; Sin_table[477] = {16'd436,-16'd2001}; Sin_table[478] = {16'd424,-16'd2004}; Sin_table[479] = {16'd412,-16'd2006}; Sin_table[480] = {16'd400,-16'd2009}; Sin_table[481] = {16'd387,-16'd2011}; Sin_table[482] = {16'd375,-16'd2013}; Sin_table[483] = {16'd363,-16'd2016}; Sin_table[484] = {16'd350,-16'd2018}; Sin_table[485] = {16'd338,-16'd2020}; Sin_table[486] = {16'd325,-16'd2022}; Sin_table[487] = {16'd313,-16'd2024}; Sin_table[488] = {16'd301,-16'd2026}; Sin_table[489] = {16'd288,-16'd2028}; Sin_table[490] = {16'd276,-16'd2029}; Sin_table[491] = {16'd263,-16'd2031}; Sin_table[492] = {16'd251,-16'd2033}; Sin_table[493] = {16'd238,-16'd2034}; Sin_table[494] = {16'd226,-16'd2036}; Sin_table[495] = {16'd213,-16'd2037}; Sin_table[496] = {16'd201,-16'd2038}; Sin_table[497] = {16'd188,-16'd2039}; Sin_table[498] = {16'd176,-16'd2040}; Sin_table[499] = {16'd163,-16'd2041}; Sin_table[500] = {16'd151,-16'd2042}; Sin_table[501] = {16'd138,-16'd2043}; Sin_table[502] = {16'd126,-16'd2044}; Sin_table[503] = {16'd113,-16'd2045}; Sin_table[504] = {16'd100,-16'd2046}; Sin_table[505] = {16'd88,-16'd2046}; Sin_table[506] = {16'd75,-16'd2047}; Sin_table[507] = {16'd63,-16'd2047}; Sin_table[508] = {16'd50,-16'd2047}; Sin_table[509] = {16'd38,-16'd2048}; Sin_table[510] = {16'd25,-16'd2048}; Sin_table[511] = {16'd13,-16'd2048}; Sin_table[512] = {16'd0,-16'd2048}; Sin_table[513] = {-16'd13,-16'd2048}; Sin_table[514] = {-16'd25,-16'd2048}; Sin_table[515] = {-16'd38,-16'd2048}; Sin_table[516] = {-16'd50,-16'd2047}; Sin_table[517] = {-16'd63,-16'd2047}; Sin_table[518] = {-16'd75,-16'd2047}; Sin_table[519] = {-16'd88,-16'd2046}; Sin_table[520] = {-16'd100,-16'd2046}; Sin_table[521] = {-16'd113,-16'd2045}; Sin_table[522] = {-16'd126,-16'd2044}; Sin_table[523] = {-16'd138,-16'd2043}; Sin_table[524] = {-16'd151,-16'd2042}; Sin_table[525] = {-16'd163,-16'd2041}; Sin_table[526] = {-16'd176,-16'd2040}; Sin_table[527] = {-16'd188,-16'd2039}; Sin_table[528] = {-16'd201,-16'd2038}; Sin_table[529] = {-16'd213,-16'd2037}; Sin_table[530] = {-16'd226,-16'd2036}; Sin_table[531] = {-16'd238,-16'd2034}; Sin_table[532] = {-16'd251,-16'd2033}; Sin_table[533] = {-16'd263,-16'd2031}; Sin_table[534] = {-16'd276,-16'd2029}; Sin_table[535] = {-16'd288,-16'd2028}; Sin_table[536] = {-16'd301,-16'd2026}; Sin_table[537] = {-16'd313,-16'd2024}; Sin_table[538] = {-16'd325,-16'd2022}; Sin_table[539] = {-16'd338,-16'd2020}; Sin_table[540] = {-16'd350,-16'd2018}; Sin_table[541] = {-16'd363,-16'd2016}; Sin_table[542] = {-16'd375,-16'd2013}; Sin_table[543] = {-16'd387,-16'd2011}; Sin_table[544] = {-16'd400,-16'd2009}; Sin_table[545] = {-16'd412,-16'd2006}; Sin_table[546] = {-16'd424,-16'd2004}; Sin_table[547] = {-16'd436,-16'd2001}; Sin_table[548] = {-16'd449,-16'd1998}; Sin_table[549] = {-16'd461,-16'd1995}; Sin_table[550] = {-16'd473,-16'd1993}; Sin_table[551] = {-16'd485,-16'd1990}; Sin_table[552] = {-16'd498,-16'd1987}; Sin_table[553] = {-16'd510,-16'd1984}; Sin_table[554] = {-16'd522,-16'd1980}; Sin_table[555] = {-16'd534,-16'd1977}; Sin_table[556] = {-16'd546,-16'd1974}; Sin_table[557] = {-16'd558,-16'd1970}; Sin_table[558] = {-16'd570,-16'd1967}; Sin_table[559] = {-16'd582,-16'd1963}; Sin_table[560] = {-16'd595,-16'd1960}; Sin_table[561] = {-16'd607,-16'd1956}; Sin_table[562] = {-16'd619,-16'd1952}; Sin_table[563] = {-16'd630,-16'd1949}; Sin_table[564] = {-16'd642,-16'd1945}; Sin_table[565] = {-16'd654,-16'd1941}; Sin_table[566] = {-16'd666,-16'd1937}; Sin_table[567] = {-16'd678,-16'd1932}; Sin_table[568] = {-16'd690,-16'd1928}; Sin_table[569] = {-16'd702,-16'd1924}; Sin_table[570] = {-16'd714,-16'd1920}; Sin_table[571] = {-16'd725,-16'd1915}; Sin_table[572] = {-16'd737,-16'd1911}; Sin_table[573] = {-16'd749,-16'd1906}; Sin_table[574] = {-16'd760,-16'd1902}; Sin_table[575] = {-16'd772,-16'd1897}; Sin_table[576] = {-16'd784,-16'd1892}; Sin_table[577] = {-16'd795,-16'd1887}; Sin_table[578] = {-16'd807,-16'd1882}; Sin_table[579] = {-16'd818,-16'd1877}; Sin_table[580] = {-16'd830,-16'd1872}; Sin_table[581] = {-16'd841,-16'd1867}; Sin_table[582] = {-16'd853,-16'd1862}; Sin_table[583] = {-16'd864,-16'd1857}; Sin_table[584] = {-16'd876,-16'd1851}; Sin_table[585] = {-16'd887,-16'd1846}; Sin_table[586] = {-16'd898,-16'd1840}; Sin_table[587] = {-16'd910,-16'd1835}; Sin_table[588] = {-16'd921,-16'd1829}; Sin_table[589] = {-16'd932,-16'd1824}; Sin_table[590] = {-16'd943,-16'd1818}; Sin_table[591] = {-16'd954,-16'd1812}; Sin_table[592] = {-16'd965,-16'd1806}; Sin_table[593] = {-16'd976,-16'd1800}; Sin_table[594] = {-16'd988,-16'd1794}; Sin_table[595] = {-16'd999,-16'd1788}; Sin_table[596] = {-16'd1009,-16'd1782}; Sin_table[597] = {-16'd1020,-16'd1776}; Sin_table[598] = {-16'd1031,-16'd1769}; Sin_table[599] = {-16'd1042,-16'd1763}; Sin_table[600] = {-16'd1053,-16'd1757}; Sin_table[601] = {-16'd1064,-16'd1750}; Sin_table[602] = {-16'd1074,-16'd1744}; Sin_table[603] = {-16'd1085,-16'd1737}; Sin_table[604] = {-16'd1096,-16'd1730}; Sin_table[605] = {-16'd1106,-16'd1724}; Sin_table[606] = {-16'd1117,-16'd1717}; Sin_table[607] = {-16'd1127,-16'd1710}; Sin_table[608] = {-16'd1138,-16'd1703}; Sin_table[609] = {-16'd1148,-16'd1696}; Sin_table[610] = {-16'd1159,-16'd1689}; Sin_table[611] = {-16'd1169,-16'd1682}; Sin_table[612] = {-16'd1179,-16'd1674}; Sin_table[613] = {-16'd1190,-16'd1667}; Sin_table[614] = {-16'd1200,-16'd1660}; Sin_table[615] = {-16'd1210,-16'd1652}; Sin_table[616] = {-16'd1220,-16'd1645}; Sin_table[617] = {-16'd1230,-16'd1637}; Sin_table[618] = {-16'd1240,-16'd1630}; Sin_table[619] = {-16'd1250,-16'd1622}; Sin_table[620] = {-16'd1260,-16'd1615}; Sin_table[621] = {-16'd1270,-16'd1607}; Sin_table[622] = {-16'd1280,-16'd1599}; Sin_table[623] = {-16'd1289,-16'd1591}; Sin_table[624] = {-16'd1299,-16'd1583}; Sin_table[625] = {-16'd1309,-16'd1575}; Sin_table[626] = {-16'd1319,-16'd1567}; Sin_table[627] = {-16'd1328,-16'd1559}; Sin_table[628] = {-16'd1338,-16'd1551}; Sin_table[629] = {-16'd1347,-16'd1543}; Sin_table[630] = {-16'd1357,-16'd1534}; Sin_table[631] = {-16'd1366,-16'd1526}; Sin_table[632] = {-16'd1375,-16'd1517}; Sin_table[633] = {-16'd1385,-16'd1509}; Sin_table[634] = {-16'd1394,-16'd1500}; Sin_table[635] = {-16'd1403,-16'd1492}; Sin_table[636] = {-16'd1412,-16'd1483}; Sin_table[637] = {-16'd1421,-16'd1475}; Sin_table[638] = {-16'd1430,-16'd1466}; Sin_table[639] = {-16'd1439,-16'd1457}; Sin_table[640] = {-16'd1448,-16'd1448}; Sin_table[641] = {-16'd1457,-16'd1439}; Sin_table[642] = {-16'd1466,-16'd1430}; Sin_table[643] = {-16'd1475,-16'd1421}; Sin_table[644] = {-16'd1483,-16'd1412}; Sin_table[645] = {-16'd1492,-16'd1403}; Sin_table[646] = {-16'd1500,-16'd1394}; Sin_table[647] = {-16'd1509,-16'd1385}; Sin_table[648] = {-16'd1517,-16'd1375}; Sin_table[649] = {-16'd1526,-16'd1366}; Sin_table[650] = {-16'd1534,-16'd1357}; Sin_table[651] = {-16'd1543,-16'd1347}; Sin_table[652] = {-16'd1551,-16'd1338}; Sin_table[653] = {-16'd1559,-16'd1328}; Sin_table[654] = {-16'd1567,-16'd1319}; Sin_table[655] = {-16'd1575,-16'd1309}; Sin_table[656] = {-16'd1583,-16'd1299}; Sin_table[657] = {-16'd1591,-16'd1289}; Sin_table[658] = {-16'd1599,-16'd1280}; Sin_table[659] = {-16'd1607,-16'd1270}; Sin_table[660] = {-16'd1615,-16'd1260}; Sin_table[661] = {-16'd1622,-16'd1250}; Sin_table[662] = {-16'd1630,-16'd1240}; Sin_table[663] = {-16'd1637,-16'd1230}; Sin_table[664] = {-16'd1645,-16'd1220}; Sin_table[665] = {-16'd1652,-16'd1210}; Sin_table[666] = {-16'd1660,-16'd1200}; Sin_table[667] = {-16'd1667,-16'd1190}; Sin_table[668] = {-16'd1674,-16'd1179}; Sin_table[669] = {-16'd1682,-16'd1169}; Sin_table[670] = {-16'd1689,-16'd1159}; Sin_table[671] = {-16'd1696,-16'd1148}; Sin_table[672] = {-16'd1703,-16'd1138}; Sin_table[673] = {-16'd1710,-16'd1127}; Sin_table[674] = {-16'd1717,-16'd1117}; Sin_table[675] = {-16'd1724,-16'd1106}; Sin_table[676] = {-16'd1730,-16'd1096}; Sin_table[677] = {-16'd1737,-16'd1085}; Sin_table[678] = {-16'd1744,-16'd1074}; Sin_table[679] = {-16'd1750,-16'd1064}; Sin_table[680] = {-16'd1757,-16'd1053}; Sin_table[681] = {-16'd1763,-16'd1042}; Sin_table[682] = {-16'd1769,-16'd1031}; Sin_table[683] = {-16'd1776,-16'd1020}; Sin_table[684] = {-16'd1782,-16'd1009}; Sin_table[685] = {-16'd1788,-16'd999}; Sin_table[686] = {-16'd1794,-16'd988}; Sin_table[687] = {-16'd1800,-16'd976}; Sin_table[688] = {-16'd1806,-16'd965}; Sin_table[689] = {-16'd1812,-16'd954}; Sin_table[690] = {-16'd1818,-16'd943}; Sin_table[691] = {-16'd1824,-16'd932}; Sin_table[692] = {-16'd1829,-16'd921}; Sin_table[693] = {-16'd1835,-16'd910}; Sin_table[694] = {-16'd1840,-16'd898}; Sin_table[695] = {-16'd1846,-16'd887}; Sin_table[696] = {-16'd1851,-16'd876}; Sin_table[697] = {-16'd1857,-16'd864}; Sin_table[698] = {-16'd1862,-16'd853}; Sin_table[699] = {-16'd1867,-16'd841}; Sin_table[700] = {-16'd1872,-16'd830}; Sin_table[701] = {-16'd1877,-16'd818}; Sin_table[702] = {-16'd1882,-16'd807}; Sin_table[703] = {-16'd1887,-16'd795}; Sin_table[704] = {-16'd1892,-16'd784}; Sin_table[705] = {-16'd1897,-16'd772}; Sin_table[706] = {-16'd1902,-16'd760}; Sin_table[707] = {-16'd1906,-16'd749}; Sin_table[708] = {-16'd1911,-16'd737}; Sin_table[709] = {-16'd1915,-16'd725}; Sin_table[710] = {-16'd1920,-16'd714}; Sin_table[711] = {-16'd1924,-16'd702}; Sin_table[712] = {-16'd1928,-16'd690}; Sin_table[713] = {-16'd1932,-16'd678}; Sin_table[714] = {-16'd1937,-16'd666}; Sin_table[715] = {-16'd1941,-16'd654}; Sin_table[716] = {-16'd1945,-16'd642}; Sin_table[717] = {-16'd1949,-16'd630}; Sin_table[718] = {-16'd1952,-16'd619}; Sin_table[719] = {-16'd1956,-16'd607}; Sin_table[720] = {-16'd1960,-16'd595}; Sin_table[721] = {-16'd1963,-16'd582}; Sin_table[722] = {-16'd1967,-16'd570}; Sin_table[723] = {-16'd1970,-16'd558}; Sin_table[724] = {-16'd1974,-16'd546}; Sin_table[725] = {-16'd1977,-16'd534}; Sin_table[726] = {-16'd1980,-16'd522}; Sin_table[727] = {-16'd1984,-16'd510}; Sin_table[728] = {-16'd1987,-16'd498}; Sin_table[729] = {-16'd1990,-16'd485}; Sin_table[730] = {-16'd1993,-16'd473}; Sin_table[731] = {-16'd1995,-16'd461}; Sin_table[732] = {-16'd1998,-16'd449}; Sin_table[733] = {-16'd2001,-16'd436}; Sin_table[734] = {-16'd2004,-16'd424}; Sin_table[735] = {-16'd2006,-16'd412}; Sin_table[736] = {-16'd2009,-16'd400}; Sin_table[737] = {-16'd2011,-16'd387}; Sin_table[738] = {-16'd2013,-16'd375}; Sin_table[739] = {-16'd2016,-16'd363}; Sin_table[740] = {-16'd2018,-16'd350}; Sin_table[741] = {-16'd2020,-16'd338}; Sin_table[742] = {-16'd2022,-16'd325}; Sin_table[743] = {-16'd2024,-16'd313}; Sin_table[744] = {-16'd2026,-16'd301}; Sin_table[745] = {-16'd2028,-16'd288}; Sin_table[746] = {-16'd2029,-16'd276}; Sin_table[747] = {-16'd2031,-16'd263}; Sin_table[748] = {-16'd2033,-16'd251}; Sin_table[749] = {-16'd2034,-16'd238}; Sin_table[750] = {-16'd2036,-16'd226}; Sin_table[751] = {-16'd2037,-16'd213}; Sin_table[752] = {-16'd2038,-16'd201}; Sin_table[753] = {-16'd2039,-16'd188}; Sin_table[754] = {-16'd2040,-16'd176}; Sin_table[755] = {-16'd2041,-16'd163}; Sin_table[756] = {-16'd2042,-16'd151}; Sin_table[757] = {-16'd2043,-16'd138}; Sin_table[758] = {-16'd2044,-16'd126}; Sin_table[759] = {-16'd2045,-16'd113}; Sin_table[760] = {-16'd2046,-16'd100}; Sin_table[761] = {-16'd2046,-16'd88}; Sin_table[762] = {-16'd2047,-16'd75}; Sin_table[763] = {-16'd2047,-16'd63}; Sin_table[764] = {-16'd2047,-16'd50}; Sin_table[765] = {-16'd2048,-16'd38}; Sin_table[766] = {-16'd2048,-16'd25}; Sin_table[767] = {-16'd2048,-16'd13}; Sin_table[768] = {-16'd2048,16'd0}; Sin_table[769] = {-16'd2048,16'd13}; Sin_table[770] = {-16'd2048,16'd25}; Sin_table[771] = {-16'd2048,16'd38}; Sin_table[772] = {-16'd2047,16'd50}; Sin_table[773] = {-16'd2047,16'd63}; Sin_table[774] = {-16'd2047,16'd75}; Sin_table[775] = {-16'd2046,16'd88}; Sin_table[776] = {-16'd2046,16'd100}; Sin_table[777] = {-16'd2045,16'd113}; Sin_table[778] = {-16'd2044,16'd126}; Sin_table[779] = {-16'd2043,16'd138}; Sin_table[780] = {-16'd2042,16'd151}; Sin_table[781] = {-16'd2041,16'd163}; Sin_table[782] = {-16'd2040,16'd176}; Sin_table[783] = {-16'd2039,16'd188}; Sin_table[784] = {-16'd2038,16'd201}; Sin_table[785] = {-16'd2037,16'd213}; Sin_table[786] = {-16'd2036,16'd226}; Sin_table[787] = {-16'd2034,16'd238}; Sin_table[788] = {-16'd2033,16'd251}; Sin_table[789] = {-16'd2031,16'd263}; Sin_table[790] = {-16'd2029,16'd276}; Sin_table[791] = {-16'd2028,16'd288}; Sin_table[792] = {-16'd2026,16'd301}; Sin_table[793] = {-16'd2024,16'd313}; Sin_table[794] = {-16'd2022,16'd325}; Sin_table[795] = {-16'd2020,16'd338}; Sin_table[796] = {-16'd2018,16'd350}; Sin_table[797] = {-16'd2016,16'd363}; Sin_table[798] = {-16'd2013,16'd375}; Sin_table[799] = {-16'd2011,16'd387}; Sin_table[800] = {-16'd2009,16'd400}; Sin_table[801] = {-16'd2006,16'd412}; Sin_table[802] = {-16'd2004,16'd424}; Sin_table[803] = {-16'd2001,16'd436}; Sin_table[804] = {-16'd1998,16'd449}; Sin_table[805] = {-16'd1995,16'd461}; Sin_table[806] = {-16'd1993,16'd473}; Sin_table[807] = {-16'd1990,16'd485}; Sin_table[808] = {-16'd1987,16'd498}; Sin_table[809] = {-16'd1984,16'd510}; Sin_table[810] = {-16'd1980,16'd522}; Sin_table[811] = {-16'd1977,16'd534}; Sin_table[812] = {-16'd1974,16'd546}; Sin_table[813] = {-16'd1970,16'd558}; Sin_table[814] = {-16'd1967,16'd570}; Sin_table[815] = {-16'd1963,16'd582}; Sin_table[816] = {-16'd1960,16'd595}; Sin_table[817] = {-16'd1956,16'd607}; Sin_table[818] = {-16'd1952,16'd619}; Sin_table[819] = {-16'd1949,16'd630}; Sin_table[820] = {-16'd1945,16'd642}; Sin_table[821] = {-16'd1941,16'd654}; Sin_table[822] = {-16'd1937,16'd666}; Sin_table[823] = {-16'd1932,16'd678}; Sin_table[824] = {-16'd1928,16'd690}; Sin_table[825] = {-16'd1924,16'd702}; Sin_table[826] = {-16'd1920,16'd714}; Sin_table[827] = {-16'd1915,16'd725}; Sin_table[828] = {-16'd1911,16'd737}; Sin_table[829] = {-16'd1906,16'd749}; Sin_table[830] = {-16'd1902,16'd760}; Sin_table[831] = {-16'd1897,16'd772}; Sin_table[832] = {-16'd1892,16'd784}; Sin_table[833] = {-16'd1887,16'd795}; Sin_table[834] = {-16'd1882,16'd807}; Sin_table[835] = {-16'd1877,16'd818}; Sin_table[836] = {-16'd1872,16'd830}; Sin_table[837] = {-16'd1867,16'd841}; Sin_table[838] = {-16'd1862,16'd853}; Sin_table[839] = {-16'd1857,16'd864}; Sin_table[840] = {-16'd1851,16'd876}; Sin_table[841] = {-16'd1846,16'd887}; Sin_table[842] = {-16'd1840,16'd898}; Sin_table[843] = {-16'd1835,16'd910}; Sin_table[844] = {-16'd1829,16'd921}; Sin_table[845] = {-16'd1824,16'd932}; Sin_table[846] = {-16'd1818,16'd943}; Sin_table[847] = {-16'd1812,16'd954}; Sin_table[848] = {-16'd1806,16'd965}; Sin_table[849] = {-16'd1800,16'd976}; Sin_table[850] = {-16'd1794,16'd988}; Sin_table[851] = {-16'd1788,16'd999}; Sin_table[852] = {-16'd1782,16'd1009}; Sin_table[853] = {-16'd1776,16'd1020}; Sin_table[854] = {-16'd1769,16'd1031}; Sin_table[855] = {-16'd1763,16'd1042}; Sin_table[856] = {-16'd1757,16'd1053}; Sin_table[857] = {-16'd1750,16'd1064}; Sin_table[858] = {-16'd1744,16'd1074}; Sin_table[859] = {-16'd1737,16'd1085}; Sin_table[860] = {-16'd1730,16'd1096}; Sin_table[861] = {-16'd1724,16'd1106}; Sin_table[862] = {-16'd1717,16'd1117}; Sin_table[863] = {-16'd1710,16'd1127}; Sin_table[864] = {-16'd1703,16'd1138}; Sin_table[865] = {-16'd1696,16'd1148}; Sin_table[866] = {-16'd1689,16'd1159}; Sin_table[867] = {-16'd1682,16'd1169}; Sin_table[868] = {-16'd1674,16'd1179}; Sin_table[869] = {-16'd1667,16'd1190}; Sin_table[870] = {-16'd1660,16'd1200}; Sin_table[871] = {-16'd1652,16'd1210}; Sin_table[872] = {-16'd1645,16'd1220}; Sin_table[873] = {-16'd1637,16'd1230}; Sin_table[874] = {-16'd1630,16'd1240}; Sin_table[875] = {-16'd1622,16'd1250}; Sin_table[876] = {-16'd1615,16'd1260}; Sin_table[877] = {-16'd1607,16'd1270}; Sin_table[878] = {-16'd1599,16'd1280}; Sin_table[879] = {-16'd1591,16'd1289}; Sin_table[880] = {-16'd1583,16'd1299}; Sin_table[881] = {-16'd1575,16'd1309}; Sin_table[882] = {-16'd1567,16'd1319}; Sin_table[883] = {-16'd1559,16'd1328}; Sin_table[884] = {-16'd1551,16'd1338}; Sin_table[885] = {-16'd1543,16'd1347}; Sin_table[886] = {-16'd1534,16'd1357}; Sin_table[887] = {-16'd1526,16'd1366}; Sin_table[888] = {-16'd1517,16'd1375}; Sin_table[889] = {-16'd1509,16'd1385}; Sin_table[890] = {-16'd1500,16'd1394}; Sin_table[891] = {-16'd1492,16'd1403}; Sin_table[892] = {-16'd1483,16'd1412}; Sin_table[893] = {-16'd1475,16'd1421}; Sin_table[894] = {-16'd1466,16'd1430}; Sin_table[895] = {-16'd1457,16'd1439}; Sin_table[896] = {-16'd1448,16'd1448}; Sin_table[897] = {-16'd1439,16'd1457}; Sin_table[898] = {-16'd1430,16'd1466}; Sin_table[899] = {-16'd1421,16'd1475}; Sin_table[900] = {-16'd1412,16'd1483}; Sin_table[901] = {-16'd1403,16'd1492}; Sin_table[902] = {-16'd1394,16'd1500}; Sin_table[903] = {-16'd1385,16'd1509}; Sin_table[904] = {-16'd1375,16'd1517}; Sin_table[905] = {-16'd1366,16'd1526}; Sin_table[906] = {-16'd1357,16'd1534}; Sin_table[907] = {-16'd1347,16'd1543}; Sin_table[908] = {-16'd1338,16'd1551}; Sin_table[909] = {-16'd1328,16'd1559}; Sin_table[910] = {-16'd1319,16'd1567}; Sin_table[911] = {-16'd1309,16'd1575}; Sin_table[912] = {-16'd1299,16'd1583}; Sin_table[913] = {-16'd1289,16'd1591}; Sin_table[914] = {-16'd1280,16'd1599}; Sin_table[915] = {-16'd1270,16'd1607}; Sin_table[916] = {-16'd1260,16'd1615}; Sin_table[917] = {-16'd1250,16'd1622}; Sin_table[918] = {-16'd1240,16'd1630}; Sin_table[919] = {-16'd1230,16'd1637}; Sin_table[920] = {-16'd1220,16'd1645}; Sin_table[921] = {-16'd1210,16'd1652}; Sin_table[922] = {-16'd1200,16'd1660}; Sin_table[923] = {-16'd1190,16'd1667}; Sin_table[924] = {-16'd1179,16'd1674}; Sin_table[925] = {-16'd1169,16'd1682}; Sin_table[926] = {-16'd1159,16'd1689}; Sin_table[927] = {-16'd1148,16'd1696}; Sin_table[928] = {-16'd1138,16'd1703}; Sin_table[929] = {-16'd1127,16'd1710}; Sin_table[930] = {-16'd1117,16'd1717}; Sin_table[931] = {-16'd1106,16'd1724}; Sin_table[932] = {-16'd1096,16'd1730}; Sin_table[933] = {-16'd1085,16'd1737}; Sin_table[934] = {-16'd1074,16'd1744}; Sin_table[935] = {-16'd1064,16'd1750}; Sin_table[936] = {-16'd1053,16'd1757}; Sin_table[937] = {-16'd1042,16'd1763}; Sin_table[938] = {-16'd1031,16'd1769}; Sin_table[939] = {-16'd1020,16'd1776}; Sin_table[940] = {-16'd1009,16'd1782}; Sin_table[941] = {-16'd999,16'd1788}; Sin_table[942] = {-16'd988,16'd1794}; Sin_table[943] = {-16'd976,16'd1800}; Sin_table[944] = {-16'd965,16'd1806}; Sin_table[945] = {-16'd954,16'd1812}; Sin_table[946] = {-16'd943,16'd1818}; Sin_table[947] = {-16'd932,16'd1824}; Sin_table[948] = {-16'd921,16'd1829}; Sin_table[949] = {-16'd910,16'd1835}; Sin_table[950] = {-16'd898,16'd1840}; Sin_table[951] = {-16'd887,16'd1846}; Sin_table[952] = {-16'd876,16'd1851}; Sin_table[953] = {-16'd864,16'd1857}; Sin_table[954] = {-16'd853,16'd1862}; Sin_table[955] = {-16'd841,16'd1867}; Sin_table[956] = {-16'd830,16'd1872}; Sin_table[957] = {-16'd818,16'd1877}; Sin_table[958] = {-16'd807,16'd1882}; Sin_table[959] = {-16'd795,16'd1887}; Sin_table[960] = {-16'd784,16'd1892}; Sin_table[961] = {-16'd772,16'd1897}; Sin_table[962] = {-16'd760,16'd1902}; Sin_table[963] = {-16'd749,16'd1906}; Sin_table[964] = {-16'd737,16'd1911}; Sin_table[965] = {-16'd725,16'd1915}; Sin_table[966] = {-16'd714,16'd1920}; Sin_table[967] = {-16'd702,16'd1924}; Sin_table[968] = {-16'd690,16'd1928}; Sin_table[969] = {-16'd678,16'd1932}; Sin_table[970] = {-16'd666,16'd1937}; Sin_table[971] = {-16'd654,16'd1941}; Sin_table[972] = {-16'd642,16'd1945}; Sin_table[973] = {-16'd630,16'd1949}; Sin_table[974] = {-16'd619,16'd1952}; Sin_table[975] = {-16'd607,16'd1956}; Sin_table[976] = {-16'd595,16'd1960}; Sin_table[977] = {-16'd582,16'd1963}; Sin_table[978] = {-16'd570,16'd1967}; Sin_table[979] = {-16'd558,16'd1970}; Sin_table[980] = {-16'd546,16'd1974}; Sin_table[981] = {-16'd534,16'd1977}; Sin_table[982] = {-16'd522,16'd1980}; Sin_table[983] = {-16'd510,16'd1984}; Sin_table[984] = {-16'd498,16'd1987}; Sin_table[985] = {-16'd485,16'd1990}; Sin_table[986] = {-16'd473,16'd1993}; Sin_table[987] = {-16'd461,16'd1995}; Sin_table[988] = {-16'd449,16'd1998}; Sin_table[989] = {-16'd436,16'd2001}; Sin_table[990] = {-16'd424,16'd2004}; Sin_table[991] = {-16'd412,16'd2006}; Sin_table[992] = {-16'd400,16'd2009}; Sin_table[993] = {-16'd387,16'd2011}; Sin_table[994] = {-16'd375,16'd2013}; Sin_table[995] = {-16'd363,16'd2016}; Sin_table[996] = {-16'd350,16'd2018}; Sin_table[997] = {-16'd338,16'd2020}; Sin_table[998] = {-16'd325,16'd2022}; Sin_table[999] = {-16'd313,16'd2024}; Sin_table[1000] = {-16'd301,16'd2026}; Sin_table[1001] = {-16'd288,16'd2028}; Sin_table[1002] = {-16'd276,16'd2029}; Sin_table[1003] = {-16'd263,16'd2031}; Sin_table[1004] = {-16'd251,16'd2033}; Sin_table[1005] = {-16'd238,16'd2034}; Sin_table[1006] = {-16'd226,16'd2036}; Sin_table[1007] = {-16'd213,16'd2037}; Sin_table[1008] = {-16'd201,16'd2038}; Sin_table[1009] = {-16'd188,16'd2039}; Sin_table[1010] = {-16'd176,16'd2040}; Sin_table[1011] = {-16'd163,16'd2041}; Sin_table[1012] = {-16'd151,16'd2042}; Sin_table[1013] = {-16'd138,16'd2043}; Sin_table[1014] = {-16'd126,16'd2044}; Sin_table[1015] = {-16'd113,16'd2045}; Sin_table[1016] = {-16'd100,16'd2046}; Sin_table[1017] = {-16'd88,16'd2046}; Sin_table[1018] = {-16'd75,16'd2047}; Sin_table[1019] = {-16'd63,16'd2047}; Sin_table[1020] = {-16'd50,16'd2047}; Sin_table[1021] = {-16'd38,16'd2047}; Sin_table[1022] = {-16'd25,16'd2047}; Sin_table[1023] = {16'd0,16'd2047};
// for (i=0;i<TableDep;i=i+1) begin
// Sin_table[i] = initialValue[(i*32)+:32];
// end
end
////////////////////////////////////////////////////////////
//
// check PRI_mode proccess
//
////////////////////////////////////////////////////////////
always @(posedge ce_clk) begin
if (s_axis_data_tready_int) begin
PRI_mode_reg <= pri_mode;
PRI_mode_reg_D <= PRI_mode_reg;
if (PRI_mode_reg != PRI_mode_reg_D) begin
PRI_mode_iterrupt <= 1;
end else begin
PRI_mode_iterrupt <= 0;
end
end
end
////////////////////////////////////////////////////////////
//
// state machine proccess
//
////////////////////////////////////////////////////////////
always @(posedge ce_clk) begin
if (ce_rst) begin
state <= IDLE;
output_enable <= 0; // disable any change
output_interrupt <= 1; // rest all the counters
start_betch <= 0;
PW_len <= 0;
PRI_len <= 0;
phase_step_reg <= 0;
betch_counter <= 0;
CW_flag <= 0;
end
else if (s_axis_data_tready_int) begin
if (PRI_mode_iterrupt) begin
state <= IDLE;
end else begin
// all the registers save the values.
state <= state;
output_enable <= output_enable;
output_interrupt <= output_interrupt;
PW_len <= PW_len;
PRI_len <= PRI_len;
phase_step_reg <= phase_step_reg;
betch_counter <= betch_counter;
CW_flag <= CW_flag;
// start_betch <= start_betch;
case (state)
IDLE : begin
// this registers are the same for all cases
betch_counter <= 0;
output_enable <= 1; // disable any change
output_interrupt <= 0; // rest all the counters
start_betch <= 1;
// check PRI mode in the power up or in case of chane of PRI_mode register.
case (pri_mode)
PRI_mode_BETCH0 : begin
SM_seq_en <= 0;
state <= BETCH_0;
PW_len <= PW_len_0;
PRI_len <= PRI_len_0;
phase_step_reg <= phase_step_0;
CW_flag <= 0;
end
PRI_mode_BETCH1 : begin
SM_seq_en <= 0;
state <= BETCH_1;
PW_len <= PW_len_1;
PRI_len <= PRI_len_1;
phase_step_reg <= phase_step_1;
CW_flag <= 0;
end
PRI_mode_BETCH2 : begin
SM_seq_en <= 0;
state <= BETCH_2;
PW_len <= PW_len_2;
PRI_len <= PRI_len_2;
phase_step_reg <= phase_step_2;
CW_flag <= 0;
end
PRI_mode_BETCH3 : begin
SM_seq_en <= 0;
state <= BETCH_3;
PW_len <= PW_len_3;
PRI_len <= PRI_len_3;
phase_step_reg <= phase_step_3;
CW_flag <= 0;
end
PRI_mode_SM : begin
SM_seq_en <= 1;
state <= BETCH_0;
PW_len <= PW_len_0;
PRI_len <= PRI_len_0;
phase_step_reg <= phase_step_0;
CW_flag <= 0;
end
PRI_mode_CW : begin
SM_seq_en <= 0;
state <= CW_STATE;
PW_len <= PW_len_CW;
PRI_len <= PRI_len_CW;
phase_step_reg <= phase_step_CW;
CW_flag <= 1;
end
endcase
end
// state of all betch
BETCH_0 : begin
start_betch <= 0;
if (end_PRI) begin
if (betch_counter == betch_len_0) begin // change betch
start_betch <= 1;
betch_counter <= 0;
if (SM_seq_en) begin
state <= BETCH_1;
PW_len <= PW_len_1;
PRI_len <= PRI_len_1;
phase_step_reg <= phase_step_1;
end else begin
state <= BETCH_0;
PW_len <= PW_len_0;
PRI_len <= PRI_len_0;
phase_step_reg <= phase_step_0;
end
end else begin
betch_counter <= betch_counter + 1;
end
end
end
BETCH_1 : begin
start_betch <= 0;
if (end_PRI) begin
if (betch_counter == betch_len_1) begin // change betch
start_betch <= 1;
betch_counter <= 0;
if (SM_seq_en) begin
state <= BETCH_2;
PW_len <= PW_len_2;
PRI_len <= PRI_len_2;
phase_step_reg <= phase_step_2;
end else begin
state <= BETCH_1;
PW_len <= PW_len_1;
PRI_len <= PRI_len_1;
phase_step_reg <= phase_step_1;
end
end else begin
betch_counter <= betch_counter + 1;
end
end
end
BETCH_2 : begin
start_betch <= 0;
if (end_PRI) begin
if (betch_counter == betch_len_2) begin // change betch
start_betch <= 1;
betch_counter <= 0;
if (SM_seq_en) begin
state <= BETCH_3;
PW_len <= PW_len_3;
PRI_len <= PRI_len_3;
phase_step_reg <= phase_step_3;
end else begin
state <= BETCH_2;
PW_len <= PW_len_2;
PRI_len <= PRI_len_2;
phase_step_reg <= phase_step_2;
end
end else begin
betch_counter <= betch_counter + 1;
end
end
end
BETCH_3 : begin
start_betch <= 0;
if (end_PRI) begin
if (betch_counter == betch_len_3) begin // change betch
start_betch <= 1;
betch_counter <= 0;
if (SM_seq_en) begin
state <= BETCH_0;
PW_len <= PW_len_0;
PRI_len <= PRI_len_0;
phase_step_reg <= phase_step_0;
end else begin
state <= BETCH_3;
PW_len <= PW_len_3;
PRI_len <= PRI_len_3;
phase_step_reg <= phase_step_3;
end
end else begin
betch_counter <= betch_counter + 1;
end
end
end
// case of CE mode
CW_STATE : begin
start_betch <= 0;
state <= CW_STATE;
PW_len <= PW_len_CW;
PRI_len <= PRI_len_CW;
phase_step_reg <= phase_step;
betch_counter <= 0;
end
default : begin // start the state machine to IDLE.
state <= IDLE;
output_enable <= 0; // disable any change
output_interrupt <= 1; // rest all the counters
start_betch <= 0;
PW_len <= 0;
PRI_len <= 0;
phase_step_reg <= 0;
betch_counter <= 0;
CW_flag <= 0;
end
endcase
end
end
end
////////////////////////////////////////////////////////////
//
// create sin Block
//
////////////////////////////////////////////////////////////
always @(posedge ce_clk) begin
if (s_axis_data_tready_int) begin
if (output_interrupt ==1 || start_betch == 1) begin // reset or new betch from state machine or end of betch
Sin_pointer <= 0;
Sin_output <= 0;
Sin_skip <= 0;
end else if (/*s_axis_data_tready_int == 1 && */ output_enable == 1) begin
{carry, Sin_skip} <= Sin_skip + phase_step_reg;
Sin_pointer <= Sin_skip [acclen-1-:accScale];
// Sin_pointer <= Sin_pointer + 1;
Sin_output <= Sin_table[Sin_pointer];
// Sin_output <= 32'd1;
end else begin // output is not valid
Sin_pointer <= 0;
Sin_output <= 0;
// Sin_output <= 32'd2;
Sin_skip <= 0;
end
end
end
////////////////////////////////////////////////////////////
//
// create PRI
//
////////////////////////////////////////////////////////////
always @(posedge ce_clk) begin
if (output_interrupt) begin // reset or new betch from state machine
PRI_counter <= 0;
PW_output <= 1'b0;
data_valid <= 0;
end else if (s_axis_data_tready_int == 1 && output_enable == 1) begin
if (CW_flag) begin // CW is case that no PW.
// if (PRI_counter < PRI_len) begin
PW_output <= 1'b1;
// PRI_counter <= PRI_counter + 1;
data_valid <= 1;
end_PRI <= 0;
start_PW <= 0;
end_PW <= 0;
// end else begin // PRI_counter = PRI_len , start new PRI count
// PW_output <= 1'b1;
// PRI_counter <= 0;
// end_PRI <= 1;
// data_valid <= 0;
// end
end else begin // not CW
if (PRI_counter == 0) begin // start new PW
PW_output <= 1'b1;
PRI_counter <= PRI_counter + 1;
data_valid <= 1;
end_PRI <= 0;
start_PW <= 1;
end_PW <= 0;
end else if (PRI_counter < PW_len) begin
PW_output <= 1'b1;
PRI_counter <= PRI_counter + 1;
data_valid <= 1;
end_PRI <= 0;
start_PW <= 0;
end_PW <= 0;
end else if (PRI_counter == PW_len) begin // end of PW
PW_output <= 1'b1;
PRI_counter <= PRI_counter + 1;
data_valid <= 1;
end_PRI <= 0;
start_PW <= 0;
end_PW <= 1;
end else if (PRI_counter < PRI_len) begin
PW_output <= 1'b0;
PRI_counter <= PRI_counter + 1;
data_valid <= 1;
end_PRI <= 0;
start_PW <= 0;
end_PW <= 0;
end else begin // PRI_counter = PRI_len, start new betch
PW_output <= 1'b0;
PRI_counter <= 16'd0;
data_valid <= 1;
end_PRI <= 1;
start_PW <= 0;
end_PW <= 0;
end
end
end
end
assign pipe_in_tdata = PW_output ? Sin_output : 32'd0;
assign pipe_in_tlast = 1'b1;
assign pipe_in_tvalid = data_valid;
// assign s_axis_data_tdata = data_out;
axi_fifo_flop #(.WIDTH(32+1))
pipeline1_axi_fifo_flop (
.clk(ce_clk),
.reset(ce_rst),
.clear(clear_tx_seqnum),
.i_tdata({pipe_in_tlast, pipe_in_tdata}),
.i_tvalid(pipe_in_tvalid),
.i_tready(pipe_in_tready),
.o_tdata({pipe_out_tlast,s_axis_data_tdata}),
.o_tvalid(s_axis_data_tvalid_int),
.o_tready(s_axis_data_tready_int));
/* Output Signals */
// assign pipe_out_tready = s_axis_data_tready;
// assign s_axis_data_tvalid = pipe_out_tvalid;
// assign s_axis_data_tlast = pipe_out_tlast;
// assign s_axis_data_tdata = pipe_out_tdata;
/* Simple Loopback */
// assign m_axis_data_tready = s_axis_data_tready;
/* assign s_axis_data_tvalid = m_axis_data_tvalid;
assign s_axis_data_tlast = m_axis_data_tlast;
assign s_axis_data_tdata = m_axis_data_tdata; */
endmodule
<?xml version="1.0"?>
<block>
<name>RFNoC: TXsource</name>
<key>modules_TXsource</key>
<category>modules</category>
<import>import modules</import>
<make>modules.TXsource(
self.device3,
uhd.stream_args( # TX Stream Args
cpu_format="fc32",
otw_format="sc16",
args="",
),
uhd.stream_args( # RX Stream Args
cpu_format="$type",
otw_format="$otw",
args="",
),
$block_index,
$device_index
)
self.$(id).set_arg("spp", $spp)
self.$(id).set_arg("enable", $enable)
self.$(id).set_arg("pri_mode", $pri_mode)
self.$(id).set_arg("phase_step", $phase_step)
</make>
<callback>set_arg("enable", $enable)</callback>
<callback>set_arg("spp", $spp)</callback>
<callback>set_arg("pri_mode", $pri_mode)</callback>
<callback>set_arg("phase_step", $phase_step)</callback>
<!-- Make one 'param' node for every Parameter you want settable from the GUI.
Sub-nodes:
* name
* key (makes the value accessible as $keyname, e.g. in the make node)
* type -->
<param>
<name>Packet Size</name>
<key>spp</key>
<value>364</value>
<type>int</type>
</param>
<param>
<name>Enable</name>
<key>enable</key>
<type>int</type>
<option>
<name>True</name>
<key>1</key>
</option>
<option>
<name>False</name>
<key>0</key>
</option>
</param>
<param>
<name>PRI mode</name>
<key>pri_mode</key>
<value>0</value>
<type>int</type>
</param>
<param>
<name>Phase step</name>
<key>phase_step</key>
<value>0</value>
<type>int</type>
</param>
<param>
<name>Host Data Type</name>
<key>type</key>
<type>enum</type>
<option>
<name>Complex float32</name>
<key>fc32</key>
<opt>type:complex</opt>
</option>
<option>
<name>Complex int16</name>
<key>sc16</key>
<opt>type:sc16</opt>
</option>
<option>
<name>Byte</name>
<key>u8</key>
<opt>type:byte</opt>
</option>
<option>
<name>VITA word32</name>
<key>item32</key>
<opt>type:s32</opt>
</option>
</param>
<!--RFNoC basic block configuration -->
<param>
<name>Device Select</name>
<key>device_index</key>
<value>-1</value>
<type>int</type>
<hide>#if int($device_index()) < 0 then 'part' else 'none'#</hide>
<tab>RFNoC Config</tab>
</param>
<param>
<name>TXsource Select</name>
<key>block_index</key>
<value>-1</value>
<type>int</type>
<hide>#if int($block_index()) < 0 then 'part' else 'none'#</hide>
<tab>RFNoC Config</tab>
</param>
<param>
<name>FPGA Module Name</name>
<key>fpga_module_name</key>
<value>noc_block_TXsource</value>
<type>string</type>
<hide>all</hide>
<tab>RFNoC Config</tab>
</param>
<param>
<name>Force Vector Length</name>
<key>grvlen</key>
<value>1</value>
<type>int</type>
</param>
<param>
<name>Device Format</name>
<key>otw</key>
<type>enum</type>
<option>
<name>Complex int16</name>
<key>sc16</key>
</option>
<option>
<name>Complex int8</name>
<key>sc8</key>
</option>
<option>
<name>Byte</name>
<key>u8</key>
</option>
</param>
<!-- Make one 'sink' node per input. Sub-nodes:
* name (an identifier for the GUI)
* type
* vlen
* optional (set to 1 for optional inputs) -->
<!-- <sink>
<name>in</name>
<type>$type.type</type>
<vlen>$grvlen</vlen>
<domain>rfnoc</domain>
</sink> -->
<!-- Make one 'source' node per output. Sub-nodes:
* name (an identifier for the GUI)
* type
* vlen
* optional (set to 1 for optional inputs) -->
<source>
<name>out</name>
<type>complex</type>
<vlen>$grvlen</vlen>
<domain>rfnoc</domain>
</source>
</block>
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