On 04/04/2020 01:39 PM, Ivan Zahartchuk via USRP-users wrote:
Hello. Can I create a binary file with two fft blocks and two window
blocks for usrp E310 for rfnoc? And if so, how ? The idea is to
receive a signal from two channels simultaneously.
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There may not be enough room for two FFT blocks in the E310 FPGA. But
regardless, you'd need Xylinx Vivado tooling to generate up an RFNOC
FPGA image that has the appropriate blocks generated into it. There
is no "dynamic" generation of blocks in the FPGA. The only "dynamic"
part is the connection of those blocks across the cross-bar construct
that RFNoC uses.
This document may be helpful:
https://kb.ettus.com/Getting_Started_with_RFNoC_Development
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