On Tue, May 4, 2021 at 12:01 PM <[email protected]> wrote: > I was looking for a place to set those values RESIZE_OUTPUT_PACKET, > SIMPLE_MODE and I assumed they will be set in the yaml descriptor file > fft_1x64.yml under parameters section, please correct me if I am wrong.
These items are in axi_wrapper.v which is only applicable for UHD < 3.15. > On the other hand, I was trying to find the signal “m_axis_pkt_len_t*” but I > did not find it, I was looking here: > https://github.com/EttusResearch/fpga/blob/master/usrp3/lib/rfnoc/blocks/rfnoc_block_fft/rfnoc_block_fft.v, > could you point me to the right place?. Also, I was looking into the RFNoC > specification but no luck. For implementation of a custom FFT block in UHD 4.0 with capability for FFT lengths > 1024, I did the following: - used axis_data (sideband interface) in yaml - used ctrlport_to_settings_bus (to convert to settings bus) - used cvita_hdr_encoder & decoder (to convert to tuser 128-bit header info) - used axi_rate_change (with M & N both set to desired FFT length) similar to the way it's used in DDC By using axi_rate_change (even though there is no rate change) in this manner, this ensures that the FFT block only receives data once a full FFT length of samples has arrived. If the upstream source sends EOB in the middle of a block of samples, that block gets discarded. The use of ctrlport_to_settings_bus and cvita_hdr_encoder makes it easy to use axi_rate_change in the manner it was designed to be used. Rob _______________________________________________ USRP-users mailing list -- [email protected] To unsubscribe send an email to [email protected]
