Raghav, I was looking into timed commands for the outputs, but how do you time the input to GPIO and cause the timed outputs to wait for the input to be active?
Regards, Jeff From: Raghav Subbaraman <[email protected]> Sent: Thursday, December 8, 2022 11:41 AM To: Jeff S <[email protected]> Cc: [email protected] Subject: Re: [USRP-users] X310 GPIO Latency Hi Jeff, We have used Timed commands to control the GPIO set/unset timing accurately (UHD 4.1.5 + GNURadio 3.8.2). We have seen that the GPIOs can be controlled with 10s of ns of accuracy in the X310. Best, Raghav On Thu, Dec 8, 2022 at 3:34 AM Jeff S <[email protected]<mailto:[email protected]>> wrote: I’ve been working on a software keying loop with the GPIO on an X310, and I measured the latency for setting a GPIO pin output wrapped back into a GPIO input to be around 5 ms on average. This was done by setting a pin manually, and then immediately polling the input pin to see how long before it switched states. I haven’t had anyone who could look at the FPGA side of the X310 yet, but I was wondering if it would be even possible to implement something in the FPGA like the ATR functionality, except it would allow for a keying loop (a Clear to Send GPIO output wrapping to a Request to Send GPIO input) and prevent transmission until the condition was true. I’m hoping that would significantly decrease the latency (less than 1 ms, hopefully) if I don’t have to bother polling the pin. Right now I’m using: UHD 4.0, and GNU Radio 3.9.5. Thanks and regards, Jeff _______________________________________________ USRP-users mailing list -- [email protected]<mailto:[email protected]> To unsubscribe send an email to [email protected]<mailto:[email protected]> -- Raghav Subbaraman PhD Student, ECE University of California San Diego rsubbaraman.github.io<https://rsubbaraman.github.io>
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