Any chance you’re using timed commands elsewhere in your application? IIRC, there is one command FIFO, and a timed command that is waiting to start will block anything that comes in behind it, even if you didn’t intend for those other actions to wait. Except for timed streamer transfers, which are handled through a separate mechanism, I believe.
I’m working from hazy memory, somebody please chime in if this is inaccurate.. -David From: [email protected] <[email protected]> Sent: Monday, February 17, 2025 8:54 AM To: [email protected] Subject: [USRP-users] Re: Reading/Write registers - Timeout Thanks for your reply. To answer your last question and give you some context. The ability to monitor FIFO status would be for debug purpose. The application we have that is interfacing to a custom RFNOC block via UHD can get are stuck (randomly over some period of time) and I am trying to find out if we are getting stuck in UHD layers or if something is happening at our end. We do have a try catch to handle “op_timeout” (and std::exception) when using peek32 and poke32. I have not seen this get trapped. Many thanks for your help
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