Hi Rob,
Sorry for the late reply. On the N320 you have 2 GiB of space that you can
divide as you like. Each channel gets a memory region defined by those
parameters. The FIFO_ADDR_BASE is the start address of each buffer and
FIFO_ADDR_MASK is effectively the size minus 1. The FIFO_ADDR_MASK must be
a power of 2 minus 1 (i.e., all ones). Set FIFO_ADDR_BASE to 0 for every
bit where the mask is 1. Take care not to create overlapping regions for
channels you intend to use. Otherwise, the data for one channel could
overwrite the data in another channel.
If you want one maximum sized FIFO buffer, you can set the mask to
31'7FFFFFFF to get a 2 GiB region. If you set each channel the same, then
you've assigned the same memory space to all four channels. This is fine if
you only intend to use one channel.
FIFO_ADDR_BASE: "{31'h00000000, 31'h00000000, 31'h00000000,
31'h00000000}"
FIFO_ADDR_MASK: "{31'h7FFFFFFF, 31'h7FFFFFFF, 31'h7FFFFFFF, 31'
h7FFFFFFF}"
If you want two maximum sized buffers, I think your example is correct
assuming you only intend to use the first and second channels.
FIFO_ADDR_BASE: "{31'h00000000, 31'h00000000, 31'h40000000,
31'h00000000}"
FIFO_ADDR_MASK: "{31'h3FFFFFFF, 31'h3FFFFFFF, 31'h3FFFFFFF,
31'h3FFFFFFF}"
If you want four maximum sized buffers, it would be:
FIFO_ADDR_BASE: "{31'h60000000, 31'h40000000, 31'h20000000,
31'h00000000}"
FIFO_ADDR_MASK: "{31'h1FFFFFFF, 31'h1FFFFFFF, 31'h1FFFFFFF, 31'
h1FFFFFFF}"
The throughput is highly application-dependent. It will vary based on the
number of channels and how much those channels contend for memory at the
same time. But we have some benchmark numbers here that will give you a
rough idea:
https://kb.ettus.com/RFNoC_Frequently_Asked_Questions#What_DRAM_data_rates_can_I_expect_on_each_USRP.3F
If you're looking for bytes per second, multiply the numbers in that table
by 4.
One common gotcha is DRAM latency/delay. You may need to tweak the
IN_FIFO_SIZE and/or OUT_FIFO_SIZE when connecting DRAM directly to a radio
block. It's possible to see under/overruns in the radio even if the DRAM is
"fast enough" due to DRAM latency, particularly when it cycles between
multiple channels. But in your case, connecting DRAM to the DDC/DUC, you'll
probably be OK as long as the timestamp delay you add is longer than the
total latency through the DRAM.
Wade
On Thu, May 28, 2026 at 9:39 AM Rob Kossler via USRP-users <
[email protected]> wrote:
> Hi,
> I am building an N320 image that is basically a repeater with static rfnoc
> links as follows:
> radio0 => ddc0 => my-timestamp-adjust => axi_ram_fifo => duc1 => radio1
>
> I have a question about how to use the parameters of the axi_ram_fifo
> block in order to maximize the FIFO depth. From the N320 BIST yml, I found
> the following:
> # These parameters match the memory interface on the N3XX
> NUM_PORTS: 4
> MEM_DATA_W: 64
> MEM_ADDR_W: 31
> # Create four non-overlapping 32 MB buffers by default
> FIFO_ADDR_BASE: "{31'h06000000, 31'h04000000, 31'h02000000,
> 31'h00000000}"
> FIFO_ADDR_MASK: "{31'h01FFFFFF, 31'h01FFFFFF, 31'h01FFFFFF,
> 31'h01FFFFFF}"
> MEM_CLK_RATE: "303819444" # 166.666666 MHz * 21.875 / 4 / 3 =
> 303.819444 MHz
>
> This indicates that there are 4 ports (later in the yml, ports 3 and 4 are
> explicitly not connected). My question is: how do I configure
> FIFO_ADDR_BASE and FIFO_ADDR_MASK in order to maximize the FIFO capacity?
>
> For the case of only needing one FIFO buffer, would this be correct?
> FIFO_ADDR_BASE: "{31'h00000000, 31'h00000000, 31'h00000000,
> 31'h00000000}"
> FIFO_ADDR_MASK: "{31'h3FFFFFFF, 31'h3FFFFFFF, 31'h3FFFFFFF,
> 31'h3FFFFFFF}"
>
> For the case of only needing two FIFO buffers, would this be correct?
> FIFO_ADDR_BASE: "{31'h00000000, 31'h00000000, 31'h40000000,
> 31'h00000000}"
> FIFO_ADDR_MASK: "{31'h3FFFFFFF, 31'h3FFFFFFF, 31'h3FFFFFFF,
> 31'h3FFFFFFF}"
>
> My other question is related to what is the maximum axi_ram_fifo
> throughput? Can I run with one port (in & out) at full streaming rate of
> 250 MS/s? Does the RAM bandwidth support this rate? How about if I have 2
> ports (in & out) - what is the maximum rate?
>
> Rob
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