Revision: 24356
Author: [email protected]
Date: Wed Oct 1 10:39:11 2014 UTC
Log: Rename Int32{UMod,UDiv} to Uint32{Div,Mod} and Int64{UMod,UDiv}
to Uint64{Div,Mod}.
[email protected], [email protected]
BUG=
Review URL: https://codereview.chromium.org/620773003
https://code.google.com/p/v8/source/detail?r=24356
Modified:
/branches/bleeding_edge/src/compiler/arm/instruction-selector-arm.cc
/branches/bleeding_edge/src/compiler/arm64/instruction-selector-arm64.cc
/branches/bleeding_edge/src/compiler/ia32/instruction-selector-ia32.cc
/branches/bleeding_edge/src/compiler/instruction-selector.cc
/branches/bleeding_edge/src/compiler/machine-operator-reducer.cc
/branches/bleeding_edge/src/compiler/machine-operator.cc
/branches/bleeding_edge/src/compiler/machine-operator.h
/branches/bleeding_edge/src/compiler/opcodes.h
/branches/bleeding_edge/src/compiler/raw-machine-assembler.h
/branches/bleeding_edge/src/compiler/representation-change.h
/branches/bleeding_edge/src/compiler/simplified-lowering.cc
/branches/bleeding_edge/src/compiler/x64/instruction-selector-x64.cc
/branches/bleeding_edge/test/cctest/compiler/test-machine-operator-reducer.cc
/branches/bleeding_edge/test/cctest/compiler/test-run-machops.cc
/branches/bleeding_edge/test/unittests/compiler/arm/instruction-selector-arm-unittest.cc
/branches/bleeding_edge/test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc
/branches/bleeding_edge/test/unittests/compiler/machine-operator-unittest.cc
=======================================
--- /branches/bleeding_edge/src/compiler/arm/instruction-selector-arm.cc
Wed Sep 24 11:08:35 2014 UTC
+++ /branches/bleeding_edge/src/compiler/arm/instruction-selector-arm.cc
Wed Oct 1 10:39:11 2014 UTC
@@ -648,7 +648,7 @@
}
-void InstructionSelector::VisitInt32UDiv(Node* node) {
+void InstructionSelector::VisitUint32Div(Node* node) {
VisitDiv(this, node, kArmUdiv, kArmVcvtF64U32, kArmVcvtU32F64);
}
@@ -680,7 +680,7 @@
}
-void InstructionSelector::VisitInt32UMod(Node* node) {
+void InstructionSelector::VisitUint32Mod(Node* node) {
VisitMod(this, node, kArmUdiv, kArmVcvtF64U32, kArmVcvtU32F64);
}
=======================================
---
/branches/bleeding_edge/src/compiler/arm64/instruction-selector-arm64.cc
Mon Sep 29 10:08:04 2014 UTC
+++
/branches/bleeding_edge/src/compiler/arm64/instruction-selector-arm64.cc
Wed Oct 1 10:39:11 2014 UTC
@@ -585,12 +585,12 @@
}
-void InstructionSelector::VisitInt32UDiv(Node* node) {
+void InstructionSelector::VisitUint32Div(Node* node) {
VisitRRR(this, kArm64Udiv32, node);
}
-void InstructionSelector::VisitInt64UDiv(Node* node) {
+void InstructionSelector::VisitUint64Div(Node* node) {
VisitRRR(this, kArm64Udiv, node);
}
@@ -605,12 +605,12 @@
}
-void InstructionSelector::VisitInt32UMod(Node* node) {
+void InstructionSelector::VisitUint32Mod(Node* node) {
VisitRRR(this, kArm64Umod32, node);
}
-void InstructionSelector::VisitInt64UMod(Node* node) {
+void InstructionSelector::VisitUint64Mod(Node* node) {
VisitRRR(this, kArm64Umod, node);
}
=======================================
--- /branches/bleeding_edge/src/compiler/ia32/instruction-selector-ia32.cc
Tue Sep 30 11:22:14 2014 UTC
+++ /branches/bleeding_edge/src/compiler/ia32/instruction-selector-ia32.cc
Wed Oct 1 10:39:11 2014 UTC
@@ -438,7 +438,7 @@
}
-void InstructionSelector::VisitInt32UDiv(Node* node) {
+void InstructionSelector::VisitUint32Div(Node* node) {
VisitDiv(this, node, kIA32Udiv);
}
@@ -459,7 +459,7 @@
}
-void InstructionSelector::VisitInt32UMod(Node* node) {
+void InstructionSelector::VisitUint32Mod(Node* node) {
VisitMod(this, node, kIA32Udiv);
}
=======================================
--- /branches/bleeding_edge/src/compiler/instruction-selector.cc Wed Oct 1
08:11:56 2014 UTC
+++ /branches/bleeding_edge/src/compiler/instruction-selector.cc Wed Oct 1
10:39:11 2014 UTC
@@ -540,20 +540,20 @@
return VisitInt32Mul(node);
case IrOpcode::kInt32Div:
return VisitInt32Div(node);
- case IrOpcode::kInt32UDiv:
- return VisitInt32UDiv(node);
case IrOpcode::kInt32Mod:
return VisitInt32Mod(node);
- case IrOpcode::kInt32UMod:
- return VisitInt32UMod(node);
case IrOpcode::kInt32LessThan:
return VisitInt32LessThan(node);
case IrOpcode::kInt32LessThanOrEqual:
return VisitInt32LessThanOrEqual(node);
+ case IrOpcode::kUint32Div:
+ return VisitUint32Div(node);
case IrOpcode::kUint32LessThan:
return VisitUint32LessThan(node);
case IrOpcode::kUint32LessThanOrEqual:
return VisitUint32LessThanOrEqual(node);
+ case IrOpcode::kUint32Mod:
+ return VisitUint32Mod(node);
case IrOpcode::kInt64Add:
return VisitInt64Add(node);
case IrOpcode::kInt64Sub:
@@ -562,18 +562,18 @@
return VisitInt64Mul(node);
case IrOpcode::kInt64Div:
return VisitInt64Div(node);
- case IrOpcode::kInt64UDiv:
- return VisitInt64UDiv(node);
case IrOpcode::kInt64Mod:
return VisitInt64Mod(node);
- case IrOpcode::kInt64UMod:
- return VisitInt64UMod(node);
case IrOpcode::kInt64LessThan:
return VisitInt64LessThan(node);
case IrOpcode::kInt64LessThanOrEqual:
return VisitInt64LessThanOrEqual(node);
+ case IrOpcode::kUint64Div:
+ return VisitUint64Div(node);
case IrOpcode::kUint64LessThan:
return VisitUint64LessThan(node);
+ case IrOpcode::kUint64Mod:
+ return VisitUint64Mod(node);
case IrOpcode::kChangeFloat32ToFloat64:
return MarkAsDouble(node), VisitChangeFloat32ToFloat64(node);
case IrOpcode::kChangeInt32ToFloat64:
@@ -765,13 +765,13 @@
void InstructionSelector::VisitInt64Div(Node* node) { UNIMPLEMENTED(); }
-void InstructionSelector::VisitInt64UDiv(Node* node) { UNIMPLEMENTED(); }
+void InstructionSelector::VisitUint64Div(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitInt64Mod(Node* node) { UNIMPLEMENTED(); }
-void InstructionSelector::VisitInt64UMod(Node* node) { UNIMPLEMENTED(); }
+void InstructionSelector::VisitUint64Mod(Node* node) { UNIMPLEMENTED(); }
void InstructionSelector::VisitChangeInt32ToInt64(Node* node) {
=======================================
--- /branches/bleeding_edge/src/compiler/machine-operator-reducer.cc Tue
Sep 30 10:42:44 2014 UTC
+++ /branches/bleeding_edge/src/compiler/machine-operator-reducer.cc Wed
Oct 1 10:39:11 2014 UTC
@@ -246,7 +246,7 @@
}
break;
}
- case IrOpcode::kInt32UDiv: {
+ case IrOpcode::kUint32Div: {
Uint32BinopMatcher m(node);
if (m.right().Is(1)) return Replace(m.left().node()); // x / 1 => x
// TODO(turbofan): if (m.left().Is(0))
@@ -275,7 +275,7 @@
}
break;
}
- case IrOpcode::kInt32UMod: {
+ case IrOpcode::kUint32Mod: {
Uint32BinopMatcher m(node);
if (m.right().Is(1)) return ReplaceInt32(0); // x % 1 => 0
// TODO(turbofan): if (m.left().Is(0))
=======================================
--- /branches/bleeding_edge/src/compiler/machine-operator.cc Wed Oct 1
08:11:56 2014 UTC
+++ /branches/bleeding_edge/src/compiler/machine-operator.cc Wed Oct 1
10:39:11 2014 UTC
@@ -84,23 +84,23 @@
V(Int32SubWithOverflow, Operator::kNoProperties, 2,
2) \
V(Int32Mul, Operator::kAssociative | Operator::kCommutative, 2,
1) \
V(Int32Div, Operator::kNoProperties, 2,
1) \
- V(Int32UDiv, Operator::kNoProperties, 2,
1) \
V(Int32Mod, Operator::kNoProperties, 2,
1) \
- V(Int32UMod, Operator::kNoProperties, 2,
1) \
V(Int32LessThan, Operator::kNoProperties, 2,
1) \
V(Int32LessThanOrEqual, Operator::kNoProperties, 2,
1) \
+ V(Uint32Div, Operator::kNoProperties, 2,
1) \
V(Uint32LessThan, Operator::kNoProperties, 2,
1) \
V(Uint32LessThanOrEqual, Operator::kNoProperties, 2,
1) \
+ V(Uint32Mod, Operator::kNoProperties, 2,
1) \
V(Int64Add, Operator::kAssociative | Operator::kCommutative, 2,
1) \
V(Int64Sub, Operator::kNoProperties, 2,
1) \
V(Int64Mul, Operator::kAssociative | Operator::kCommutative, 2,
1) \
V(Int64Div, Operator::kNoProperties, 2,
1) \
- V(Int64UDiv, Operator::kNoProperties, 2,
1) \
V(Int64Mod, Operator::kNoProperties, 2,
1) \
- V(Int64UMod, Operator::kNoProperties, 2,
1) \
V(Int64LessThan, Operator::kNoProperties, 2,
1) \
V(Int64LessThanOrEqual, Operator::kNoProperties, 2,
1) \
+ V(Uint64Div, Operator::kNoProperties, 2,
1) \
V(Uint64LessThan, Operator::kNoProperties, 2,
1) \
+ V(Uint64Mod, Operator::kNoProperties, 2,
1) \
V(ChangeFloat32ToFloat64, Operator::kNoProperties, 1,
1) \
V(ChangeFloat64ToInt32, Operator::kNoProperties, 1,
1) \
V(ChangeFloat64ToUint32, Operator::kNoProperties, 1,
1) \
=======================================
--- /branches/bleeding_edge/src/compiler/machine-operator.h Wed Oct 1
08:11:56 2014 UTC
+++ /branches/bleeding_edge/src/compiler/machine-operator.h Wed Oct 1
10:39:11 2014 UTC
@@ -87,24 +87,24 @@
const Operator* Int32SubWithOverflow();
const Operator* Int32Mul();
const Operator* Int32Div();
- const Operator* Int32UDiv();
const Operator* Int32Mod();
- const Operator* Int32UMod();
const Operator* Int32LessThan();
const Operator* Int32LessThanOrEqual();
+ const Operator* Uint32Div();
const Operator* Uint32LessThan();
const Operator* Uint32LessThanOrEqual();
+ const Operator* Uint32Mod();
const Operator* Int64Add();
const Operator* Int64Sub();
const Operator* Int64Mul();
const Operator* Int64Div();
- const Operator* Int64UDiv();
const Operator* Int64Mod();
- const Operator* Int64UMod();
const Operator* Int64LessThan();
const Operator* Int64LessThanOrEqual();
+ const Operator* Uint64Div();
const Operator* Uint64LessThan();
+ const Operator* Uint64Mod();
// These operators change the representation of numbers while preserving
the
// value of the number. Narrowing operators assume the input is
representable
@@ -164,12 +164,12 @@
V(Int, Sub) \
V(Int, Mul) \
V(Int, Div) \
- V(Int, UDiv) \
V(Int, Mod) \
- V(Int, UMod) \
V(Int, LessThan) \
V(Int, LessThanOrEqual) \
- V(Uint, LessThan)
+ V(Uint, Div) \
+ V(Uint, LessThan) \
+ V(Uint, Mod)
#define PSEUDO_OP(Prefix, Suffix) \
const Operator* Prefix##Suffix() { \
return Is32() ? Prefix##32##Suffix() : Prefix##64##Suffix(); \
=======================================
--- /branches/bleeding_edge/src/compiler/opcodes.h Wed Oct 1 08:11:56 2014
UTC
+++ /branches/bleeding_edge/src/compiler/opcodes.h Wed Oct 1 10:39:11 2014
UTC
@@ -187,23 +187,23 @@
V(Int32SubWithOverflow) \
V(Int32Mul) \
V(Int32Div) \
- V(Int32UDiv) \
V(Int32Mod) \
- V(Int32UMod) \
V(Int32LessThan) \
V(Int32LessThanOrEqual) \
+ V(Uint32Div) \
V(Uint32LessThan) \
V(Uint32LessThanOrEqual) \
+ V(Uint32Mod) \
V(Int64Add) \
V(Int64Sub) \
V(Int64Mul) \
V(Int64Div) \
- V(Int64UDiv) \
V(Int64Mod) \
- V(Int64UMod) \
V(Int64LessThan) \
V(Int64LessThanOrEqual) \
+ V(Uint64Div) \
V(Uint64LessThan) \
+ V(Uint64Mod) \
V(ChangeFloat32ToFloat64) \
V(ChangeFloat64ToInt32) \
V(ChangeFloat64ToUint32) \
=======================================
--- /branches/bleeding_edge/src/compiler/raw-machine-assembler.h Thu Sep 25
08:56:02 2014 UTC
+++ /branches/bleeding_edge/src/compiler/raw-machine-assembler.h Wed Oct 1
10:39:11 2014 UTC
@@ -228,27 +228,27 @@
Node* Int32Div(Node* a, Node* b) {
return NewNode(machine()->Int32Div(), a, b);
}
- Node* Int32UDiv(Node* a, Node* b) {
- return NewNode(machine()->Int32UDiv(), a, b);
- }
Node* Int32Mod(Node* a, Node* b) {
return NewNode(machine()->Int32Mod(), a, b);
}
- Node* Int32UMod(Node* a, Node* b) {
- return NewNode(machine()->Int32UMod(), a, b);
- }
Node* Int32LessThan(Node* a, Node* b) {
return NewNode(machine()->Int32LessThan(), a, b);
}
Node* Int32LessThanOrEqual(Node* a, Node* b) {
return NewNode(machine()->Int32LessThanOrEqual(), a, b);
}
+ Node* Uint32Div(Node* a, Node* b) {
+ return NewNode(machine()->Uint32Div(), a, b);
+ }
Node* Uint32LessThan(Node* a, Node* b) {
return NewNode(machine()->Uint32LessThan(), a, b);
}
Node* Uint32LessThanOrEqual(Node* a, Node* b) {
return NewNode(machine()->Uint32LessThanOrEqual(), a, b);
}
+ Node* Uint32Mod(Node* a, Node* b) {
+ return NewNode(machine()->Uint32Mod(), a, b);
+ }
Node* Int32GreaterThan(Node* a, Node* b) { return Int32LessThan(b, a); }
Node* Int32GreaterThanOrEqual(Node* a, Node* b) {
return Int32LessThanOrEqual(b, a);
@@ -267,15 +267,9 @@
Node* Int64Div(Node* a, Node* b) {
return NewNode(machine()->Int64Div(), a, b);
}
- Node* Int64UDiv(Node* a, Node* b) {
- return NewNode(machine()->Int64UDiv(), a, b);
- }
Node* Int64Mod(Node* a, Node* b) {
return NewNode(machine()->Int64Mod(), a, b);
}
- Node* Int64UMod(Node* a, Node* b) {
- return NewNode(machine()->Int64UMod(), a, b);
- }
Node* Int64Neg(Node* a) { return Int64Sub(Int64Constant(0), a); }
Node* Int64LessThan(Node* a, Node* b) {
return NewNode(machine()->Int64LessThan(), a, b);
@@ -287,6 +281,12 @@
Node* Int64GreaterThanOrEqual(Node* a, Node* b) {
return Int64LessThanOrEqual(b, a);
}
+ Node* Uint64Div(Node* a, Node* b) {
+ return NewNode(machine()->Uint64Div(), a, b);
+ }
+ Node* Uint64Mod(Node* a, Node* b) {
+ return NewNode(machine()->Uint64Mod(), a, b);
+ }
// TODO(turbofan): What is this used for?
Node* ConvertIntPtrToInt32(Node* a) {
=======================================
--- /branches/bleeding_edge/src/compiler/representation-change.h Tue Sep 30
10:29:32 2014 UTC
+++ /branches/bleeding_edge/src/compiler/representation-change.h Wed Oct 1
10:39:11 2014 UTC
@@ -330,9 +330,9 @@
case IrOpcode::kNumberMultiply:
return machine()->Int32Mul();
case IrOpcode::kNumberDivide:
- return machine()->Int32UDiv();
+ return machine()->Uint32Div();
case IrOpcode::kNumberModulus:
- return machine()->Int32UMod();
+ return machine()->Uint32Mod();
case IrOpcode::kNumberEqual:
return machine()->Word32Equal();
case IrOpcode::kNumberLessThan:
=======================================
--- /branches/bleeding_edge/src/compiler/simplified-lowering.cc Wed Oct 1
08:11:56 2014 UTC
+++ /branches/bleeding_edge/src/compiler/simplified-lowering.cc Wed Oct 1
10:39:11 2014 UTC
@@ -652,8 +652,8 @@
case IrOpcode::kInt32Div:
case IrOpcode::kInt32Mod:
return VisitInt32Binop(node);
- case IrOpcode::kInt32UDiv:
- case IrOpcode::kInt32UMod:
+ case IrOpcode::kUint32Div:
+ case IrOpcode::kUint32Mod:
return VisitUint32Binop(node);
case IrOpcode::kInt32LessThan:
case IrOpcode::kInt32LessThanOrEqual:
@@ -676,8 +676,8 @@
case IrOpcode::kUint64LessThan:
return VisitUint64Cmp(node);
- case IrOpcode::kInt64UDiv:
- case IrOpcode::kInt64UMod:
+ case IrOpcode::kUint64Div:
+ case IrOpcode::kUint64Mod:
return VisitUint64Binop(node);
case IrOpcode::kWord64And:
=======================================
--- /branches/bleeding_edge/src/compiler/x64/instruction-selector-x64.cc
Tue Sep 30 10:24:11 2014 UTC
+++ /branches/bleeding_edge/src/compiler/x64/instruction-selector-x64.cc
Wed Oct 1 10:39:11 2014 UTC
@@ -545,12 +545,12 @@
}
-void InstructionSelector::VisitInt32UDiv(Node* node) {
+void InstructionSelector::VisitUint32Div(Node* node) {
VisitDiv(this, node, kX64Udiv32);
}
-void InstructionSelector::VisitInt64UDiv(Node* node) {
+void InstructionSelector::VisitUint64Div(Node* node) {
VisitDiv(this, node, kX64Udiv);
}
@@ -575,12 +575,12 @@
}
-void InstructionSelector::VisitInt32UMod(Node* node) {
+void InstructionSelector::VisitUint32Mod(Node* node) {
VisitMod(this, node, kX64Udiv32);
}
-void InstructionSelector::VisitInt64UMod(Node* node) {
+void InstructionSelector::VisitUint64Mod(Node* node) {
VisitMod(this, node, kX64Udiv);
}
=======================================
---
/branches/bleeding_edge/test/cctest/compiler/test-machine-operator-reducer.cc
Tue Sep 30 10:42:44 2014 UTC
+++
/branches/bleeding_edge/test/cctest/compiler/test-machine-operator-reducer.cc
Wed Oct 1 10:39:11 2014 UTC
@@ -477,9 +477,9 @@
}
-TEST(ReduceInt32UDiv) {
+TEST(ReduceUint32Div) {
ReducerTester R;
- R.binop = R.machine.Int32UDiv();
+ R.binop = R.machine.Uint32Div();
FOR_UINT32_INPUTS(pl) {
FOR_UINT32_INPUTS(pr) {
@@ -530,9 +530,9 @@
}
-TEST(ReduceInt32UMod) {
+TEST(ReduceUint32Mod) {
ReducerTester R;
- R.binop = R.machine.Int32UMod();
+ R.binop = R.machine.Uint32Mod();
FOR_INT32_INPUTS(pl) {
FOR_INT32_INPUTS(pr) {
@@ -819,9 +819,9 @@
// TODO(titzer): test MachineOperatorReducer for Int64Mul
// TODO(titzer): test MachineOperatorReducer for Int64UMul
// TODO(titzer): test MachineOperatorReducer for Int64Div
-// TODO(titzer): test MachineOperatorReducer for Int64UDiv
+// TODO(titzer): test MachineOperatorReducer for Uint64Div
// TODO(titzer): test MachineOperatorReducer for Int64Mod
-// TODO(titzer): test MachineOperatorReducer for Int64UMod
+// TODO(titzer): test MachineOperatorReducer for Uint64Mod
// TODO(titzer): test MachineOperatorReducer for Int64Neg
// TODO(titzer): test MachineOperatorReducer for ChangeInt32ToFloat64
// TODO(titzer): test MachineOperatorReducer for ChangeFloat64ToInt32
=======================================
--- /branches/bleeding_edge/test/cctest/compiler/test-run-machops.cc Tue
Sep 30 10:24:11 2014 UTC
+++ /branches/bleeding_edge/test/cctest/compiler/test-run-machops.cc Wed
Oct 1 10:39:11 2014 UTC
@@ -64,8 +64,8 @@
m.machine()->Word32Shr(), m.machine()->Word32Sar(),
m.machine()->Word32Equal(), m.machine()->Int32Add(),
m.machine()->Int32Sub(), m.machine()->Int32Mul(),
- m.machine()->Int32Div(), m.machine()->Int32UDiv(),
- m.machine()->Int32Mod(), m.machine()->Int32UMod(),
+ m.machine()->Int32Div(), m.machine()->Uint32Div(),
+ m.machine()->Int32Mod(), m.machine()->Uint32Mod(),
m.machine()->Int32LessThan(), m.machine()->Int32LessThanOrEqual(),
m.machine()->Uint32LessThan(), m.machine()->Uint32LessThanOrEqual(),
NULL};
@@ -1381,11 +1381,11 @@
}
-TEST(RunInt32UDivP) {
+TEST(RunUint32DivP) {
{
RawMachineAssemblerTester<int32_t> m;
Int32BinopTester bt(&m);
- bt.AddReturn(m.Int32UDiv(bt.param0, bt.param1));
+ bt.AddReturn(m.Uint32Div(bt.param0, bt.param1));
FOR_UINT32_INPUTS(i) {
FOR_UINT32_INPUTS(j) {
uint32_t p0 = *i;
@@ -1400,7 +1400,7 @@
{
RawMachineAssemblerTester<int32_t> m;
Int32BinopTester bt(&m);
- bt.AddReturn(m.Int32Add(bt.param0, m.Int32UDiv(bt.param0, bt.param1)));
+ bt.AddReturn(m.Int32Add(bt.param0, m.Uint32Div(bt.param0, bt.param1)));
FOR_UINT32_INPUTS(i) {
FOR_UINT32_INPUTS(j) {
uint32_t p0 = *i;
@@ -1449,11 +1449,11 @@
}
-TEST(RunInt32UModP) {
+TEST(RunUint32ModP) {
{
RawMachineAssemblerTester<int32_t> m;
Int32BinopTester bt(&m);
- bt.AddReturn(m.Int32UMod(bt.param0, bt.param1));
+ bt.AddReturn(m.Uint32Mod(bt.param0, bt.param1));
FOR_UINT32_INPUTS(i) {
FOR_UINT32_INPUTS(j) {
uint32_t p0 = *i;
@@ -1468,7 +1468,7 @@
{
RawMachineAssemblerTester<int32_t> m;
Int32BinopTester bt(&m);
- bt.AddReturn(m.Int32Add(bt.param0, m.Int32UMod(bt.param0, bt.param1)));
+ bt.AddReturn(m.Int32Add(bt.param0, m.Uint32Mod(bt.param0, bt.param1)));
FOR_UINT32_INPUTS(i) {
FOR_UINT32_INPUTS(j) {
uint32_t p0 = *i;
@@ -2665,8 +2665,8 @@
m.machine()->Word32Ror(), m.machine()->Word32Equal(),
m.machine()->Int32Add(), m.machine()->Int32Sub(),
m.machine()->Int32Mul(), m.machine()->Int32Div(),
- m.machine()->Int32UDiv(), m.machine()->Int32Mod(),
- m.machine()->Int32UMod(), m.machine()->Int32LessThan(),
+ m.machine()->Uint32Div(), m.machine()->Int32Mod(),
+ m.machine()->Uint32Mod(), m.machine()->Int32LessThan(),
m.machine()->Int32LessThanOrEqual(), m.machine()->Uint32LessThan(),
m.machine()->Uint32LessThanOrEqual(), NULL};
=======================================
---
/branches/bleeding_edge/test/unittests/compiler/arm/instruction-selector-arm-unittest.cc
Wed Oct 1 08:34:25 2014 UTC
+++
/branches/bleeding_edge/test/unittests/compiler/arm/instruction-selector-arm-unittest.cc
Wed Oct 1 10:39:11 2014 UTC
@@ -1580,9 +1580,9 @@
}
-TEST_F(InstructionSelectorTest, Int32UDivWithParameters) {
+TEST_F(InstructionSelectorTest, Uint32DivWithParameters) {
StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
- m.Return(m.Int32UDiv(m.Parameter(0), m.Parameter(1)));
+ m.Return(m.Uint32Div(m.Parameter(0), m.Parameter(1)));
Stream s = m.Build();
ASSERT_EQ(4U, s.size());
EXPECT_EQ(kArmVcvtF64U32, s[0]->arch_opcode());
@@ -1600,18 +1600,18 @@
}
-TEST_F(InstructionSelectorTest, Int32UDivWithParametersForSUDIV) {
+TEST_F(InstructionSelectorTest, Uint32DivWithParametersForSUDIV) {
StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
- m.Return(m.Int32UDiv(m.Parameter(0), m.Parameter(1)));
+ m.Return(m.Uint32Div(m.Parameter(0), m.Parameter(1)));
Stream s = m.Build(SUDIV);
ASSERT_EQ(1U, s.size());
EXPECT_EQ(kArmUdiv, s[0]->arch_opcode());
}
-TEST_F(InstructionSelectorTest, Int32UModWithParameters) {
+TEST_F(InstructionSelectorTest, Uint32ModWithParameters) {
StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
- m.Return(m.Int32UMod(m.Parameter(0), m.Parameter(1)));
+ m.Return(m.Uint32Mod(m.Parameter(0), m.Parameter(1)));
Stream s = m.Build();
ASSERT_EQ(6U, s.size());
EXPECT_EQ(kArmVcvtF64U32, s[0]->arch_opcode());
@@ -1639,9 +1639,9 @@
}
-TEST_F(InstructionSelectorTest, Int32UModWithParametersForSUDIV) {
+TEST_F(InstructionSelectorTest, Uint32ModWithParametersForSUDIV) {
StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
- m.Return(m.Int32UMod(m.Parameter(0), m.Parameter(1)));
+ m.Return(m.Uint32Mod(m.Parameter(0), m.Parameter(1)));
Stream s = m.Build(SUDIV);
ASSERT_EQ(3U, s.size());
EXPECT_EQ(kArmUdiv, s[0]->arch_opcode());
@@ -1660,9 +1660,9 @@
}
-TEST_F(InstructionSelectorTest, Int32UModWithParametersForSUDIVAndMLS) {
+TEST_F(InstructionSelectorTest, Uint32ModWithParametersForSUDIVAndMLS) {
StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32);
- m.Return(m.Int32UMod(m.Parameter(0), m.Parameter(1)));
+ m.Return(m.Uint32Mod(m.Parameter(0), m.Parameter(1)));
Stream s = m.Build(MLS, SUDIV);
ASSERT_EQ(2U, s.size());
EXPECT_EQ(kArmUdiv, s[0]->arch_opcode());
=======================================
---
/branches/bleeding_edge/test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc
Wed Oct 1 08:34:25 2014 UTC
+++
/branches/bleeding_edge/test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc
Wed Oct 1 10:39:11 2014 UTC
@@ -141,8 +141,8 @@
{&RawMachineAssembler::Int64Mul, "Int64Mul", kArm64Mul, kMachInt64},
{&RawMachineAssembler::Int32Div, "Int32Div", kArm64Idiv32, kMachInt32},
{&RawMachineAssembler::Int64Div, "Int64Div", kArm64Idiv, kMachInt64},
- {&RawMachineAssembler::Int32UDiv, "Int32UDiv", kArm64Udiv32,
kMachInt32},
- {&RawMachineAssembler::Int64UDiv, "Int64UDiv", kArm64Udiv,
kMachInt64}};
+ {&RawMachineAssembler::Uint32Div, "Uint32Div", kArm64Udiv32,
kMachInt32},
+ {&RawMachineAssembler::Uint64Div, "Uint64Div", kArm64Udiv,
kMachInt64}};
// ARM64 FP arithmetic instructions.
=======================================
---
/branches/bleeding_edge/test/unittests/compiler/machine-operator-unittest.cc
Wed Oct 1 08:34:25 2014 UTC
+++
/branches/bleeding_edge/test/unittests/compiler/machine-operator-unittest.cc
Wed Oct 1 10:39:11 2014 UTC
@@ -184,13 +184,13 @@
PURE(Int32Add, 2, 1), PURE(Int32AddWithOverflow, 2, 2),
PURE(Int32Sub, 2, 1), PURE(Int32SubWithOverflow, 2, 2),
PURE(Int32Mul, 2, 1), PURE(Int32Div, 2, 1),
- PURE(Int32UDiv, 2, 1), PURE(Int32Mod, 2, 1),
- PURE(Int32UMod, 2, 1), PURE(Int32LessThan, 2, 1),
+ PURE(Uint32Div, 2, 1), PURE(Int32Mod, 2, 1),
+ PURE(Uint32Mod, 2, 1), PURE(Int32LessThan, 2, 1),
PURE(Int32LessThanOrEqual, 2, 1), PURE(Uint32LessThan, 2, 1),
PURE(Uint32LessThanOrEqual, 2, 1), PURE(Int64Add, 2, 1),
PURE(Int64Sub, 2, 1), PURE(Int64Mul, 2, 1),
- PURE(Int64Div, 2, 1), PURE(Int64UDiv, 2, 1),
- PURE(Int64Mod, 2, 1), PURE(Int64UMod, 2, 1),
+ PURE(Int64Div, 2, 1), PURE(Uint64Div, 2, 1),
+ PURE(Int64Mod, 2, 1), PURE(Uint64Mod, 2, 1),
PURE(Int64LessThan, 2, 1), PURE(Int64LessThanOrEqual, 2, 1),
PURE(Uint64LessThan, 2, 1), PURE(ChangeFloat32ToFloat64, 1, 1),
PURE(ChangeFloat64ToInt32, 1, 1), PURE(ChangeFloat64ToUint32, 1, 1),
@@ -278,9 +278,9 @@
EXPECT_EQ(machine.Int32Sub(), machine.IntSub());
EXPECT_EQ(machine.Int32Mul(), machine.IntMul());
EXPECT_EQ(machine.Int32Div(), machine.IntDiv());
- EXPECT_EQ(machine.Int32UDiv(), machine.IntUDiv());
+ EXPECT_EQ(machine.Uint32Div(), machine.UintDiv());
EXPECT_EQ(machine.Int32Mod(), machine.IntMod());
- EXPECT_EQ(machine.Int32UMod(), machine.IntUMod());
+ EXPECT_EQ(machine.Uint32Mod(), machine.UintMod());
EXPECT_EQ(machine.Int32LessThan(), machine.IntLessThan());
EXPECT_EQ(machine.Int32LessThanOrEqual(), machine.IntLessThanOrEqual());
}
@@ -300,9 +300,9 @@
EXPECT_EQ(machine.Int64Sub(), machine.IntSub());
EXPECT_EQ(machine.Int64Mul(), machine.IntMul());
EXPECT_EQ(machine.Int64Div(), machine.IntDiv());
- EXPECT_EQ(machine.Int64UDiv(), machine.IntUDiv());
+ EXPECT_EQ(machine.Uint64Div(), machine.UintDiv());
EXPECT_EQ(machine.Int64Mod(), machine.IntMod());
- EXPECT_EQ(machine.Int64UMod(), machine.IntUMod());
+ EXPECT_EQ(machine.Uint64Mod(), machine.UintMod());
EXPECT_EQ(machine.Int64LessThan(), machine.IntLessThan());
EXPECT_EQ(machine.Int64LessThanOrEqual(), machine.IntLessThanOrEqual());
}
--
--
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