Revision: 4492
Author: [email protected]
Date: Mon Apr 26 04:41:39 2010
Log: Cosmetic changes to the ARM port.
Review URL: http://codereview.chromium.org/1790002
http://code.google.com/p/v8/source/detail?r=4492

Modified:
 /branches/bleeding_edge/src/arm/builtins-arm.cc
 /branches/bleeding_edge/src/arm/codegen-arm.cc
 /branches/bleeding_edge/src/arm/ic-arm.cc
 /branches/bleeding_edge/src/arm/stub-cache-arm.cc

=======================================
--- /branches/bleeding_edge/src/arm/builtins-arm.cc     Wed Feb 24 00:33:51 2010
+++ /branches/bleeding_edge/src/arm/builtins-arm.cc     Mon Apr 26 04:41:39 2010
@@ -593,7 +593,7 @@
       __ bind(&loop);
       __ str(r7, MemOperand(r5, kPointerSize, PostIndex));
       __ bind(&entry);
-      __ cmp(r5, Operand(r6));
+      __ cmp(r5, r6);
       __ b(lt, &loop);
     }

@@ -666,7 +666,7 @@
       __ bind(&loop);
       __ str(r7, MemOperand(r2, kPointerSize, PostIndex));
       __ bind(&entry);
-      __ cmp(r2, Operand(r6));
+      __ cmp(r2, r6);
       __ b(lt, &loop);
     }

@@ -863,7 +863,7 @@
   __ ldr(r0, MemOperand(r0));  // dereference handle
   __ push(r0);  // push parameter
   __ bind(&entry);
-  __ cmp(r4, Operand(r2));
+  __ cmp(r4, r2);
   __ b(ne, &loop);

// Initialize all JavaScript callee-saved registers, since they will be seen
@@ -1213,7 +1213,7 @@
   Label invoke, dont_adapt_arguments;

   Label enough, too_few;
-  __ cmp(r0, Operand(r2));
+  __ cmp(r0, r2);
   __ b(lt, &too_few);
   __ cmp(r2, Operand(SharedFunctionInfo::kDontAdaptArgumentsSentinel));
   __ b(eq, &dont_adapt_arguments);
=======================================
--- /branches/bleeding_edge/src/arm/codegen-arm.cc      Mon Apr 26 04:06:37 2010
+++ /branches/bleeding_edge/src/arm/codegen-arm.cc      Mon Apr 26 04:41:39 2010
@@ -206,7 +206,7 @@

 #ifdef DEBUG
         JumpTarget verified_true;
-        __ cmp(r0, Operand(cp));
+        __ cmp(r0, cp);
         verified_true.Branch(eq);
         __ stop("NewContext: r0 is expected to be the same as cp");
         verified_true.Bind();
@@ -1992,7 +1992,7 @@
   }
 #ifdef DEBUG
   JumpTarget verified_true;
-  __ cmp(r0, Operand(cp));
+  __ cmp(r0, cp);
   verified_true.Branch(eq);
   __ stop("PushContext: r0 is expected to be the same as cp");
   verified_true.Bind();
@@ -2469,7 +2469,7 @@

   __ ldr(r0, frame_->ElementAt(0));  // load the current count
   __ ldr(r1, frame_->ElementAt(1));  // load the length
-  __ cmp(r0, Operand(r1));  // compare to the array length
+  __ cmp(r0, r1);  // compare to the array length
   node->break_target()->Branch(hs);

   __ ldr(r0, frame_->ElementAt(0));
@@ -4545,7 +4545,7 @@
   LoadAndSpill(args->at(1));
   frame_->EmitPop(r0);
   frame_->EmitPop(r1);
-  __ cmp(r0, Operand(r1));
+  __ cmp(r0, r1);
   cc_reg_ = eq;
 }

@@ -5773,7 +5773,7 @@
   Label not_identical;
   Label heap_number, return_equal;
   Register exp_mask_reg = r5;
-  __ cmp(r0, Operand(r1));
+  __ cmp(r0, r1);
   __ b(ne, &not_identical);

// The two objects are identical. If we know that one of them isn't NaN then
@@ -5802,7 +5802,7 @@
           __ cmp(r4, Operand(ODDBALL_TYPE));
           __ b(ne, &return_equal);
           __ LoadRoot(r2, Heap::kUndefinedValueRootIndex);
-          __ cmp(r0, Operand(r2));
+          __ cmp(r0, r2);
           __ b(ne, &return_equal);
           if (cc == le) {
             // undefined <= undefined should fail.
@@ -8138,7 +8138,8 @@
   __ ldr(last_match_info_elements,
          FieldMemOperand(r0, JSArray::kElementsOffset));
__ ldr(r0, FieldMemOperand(last_match_info_elements, HeapObject::kMapOffset));
-  __ cmp(r0, Operand(Factory::fixed_array_map()));
+  __ LoadRoot(ip, kFixedArrayMapRootIndex);
+  __ cmp(r0, ip);
   __ b(ne, &runtime);
// Check that the last match info has space for the capture registers and the
   // additional information.
=======================================
--- /branches/bleeding_edge/src/arm/ic-arm.cc   Fri Apr 23 05:57:41 2010
+++ /branches/bleeding_edge/src/arm/ic-arm.cc   Mon Apr 26 04:41:39 2010
@@ -576,7 +576,7 @@
// then this is not related to an inlined in-object property load. The nop1 // instruction is located just after the call to the IC in the deferred code // handling the miss in the inlined code. After the nop1 instruction there is
-  // a B instruction for jumping back from the deferred code.
+  // a branch instruction for jumping back from the deferred code.
Address address_after_call = address + Assembler::kCallTargetAddressOffset;
   Instr instr_after_call = Assembler::instr_at(address_after_call);
   if (!Assembler::IsNop(instr_after_call, NAMED_PROPERTY_LOAD_INLINED)) {
@@ -709,7 +709,7 @@
   __ b(ne, &check_pixel_array);
   // Check that the key (index) is within bounds.
   __ ldr(r3, FieldMemOperand(r1, Array::kLengthOffset));
-  __ cmp(r0, Operand(r3));
+  __ cmp(r0, r3);
   __ b(hs, &slow);
   // Fast case: Do the load.
   __ add(r3, r1, Operand(FixedArray::kHeaderSize - kHeapObjectTag));
=======================================
--- /branches/bleeding_edge/src/arm/stub-cache-arm.cc Tue Apr 20 03:20:39 2010 +++ /branches/bleeding_edge/src/arm/stub-cache-arm.cc Mon Apr 26 04:41:39 2010
@@ -53,7 +53,7 @@
   // Check that the key in the entry matches the name.
   __ mov(ip, Operand(key_offset));
   __ ldr(ip, MemOperand(ip, offset, LSL, 1));
-  __ cmp(name, Operand(ip));
+  __ cmp(name, ip);
   __ b(ne, &miss);

   // Get the code entry from the cache.

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