Reviewers: Erik Corry, Description: Fix an issue in the ARM port where a left shift was predicted to have a Smi result when it had an int32 result.
BUG=none TEST=using the --nofull_compiler option, the following code should not crash: "var s = 0x3fffffff; ((s << 1) + 0x00ff0000) > 0;" Please review this at http://codereview.chromium.org/3195004/show SVN Base: http://v8.googlecode.com/svn/branches/bleeding_edge/ Affected files: M src/arm/codegen-arm.cc Index: src/arm/codegen-arm.cc =================================================================== --- src/arm/codegen-arm.cc (revision 5302) +++ src/arm/codegen-arm.cc (working copy) @@ -1222,21 +1222,25 @@ case Token::SHR: case Token::SAR: { ASSERT(!reversed); - TypeInfo result = - (op == Token::SAR) ? TypeInfo::Integer32() : TypeInfo::Number(); - if (!reversed) { - if (op == Token::SHR) { - if (int_value >= 2) { - result = TypeInfo::Smi(); - } else if (int_value >= 1) { - result = TypeInfo::Integer32(); - } + int shift_amount = int_value & 0x1f; + TypeInfo result = TypeInfo::Number(); + + if (op == Token::SHR) { + if (shift_amount > 1) { + result = TypeInfo::Smi(); + } else if (shift_amount > 0) { + result = TypeInfo::Integer32(); + } + } else if (op == Token::SAR) { + if (shift_amount > 0) { + result = TypeInfo::Smi(); } else { - if (int_value >= 1) { - result = TypeInfo::Smi(); - } + result = TypeInfo::Integer32(); } + } else { // Token::SHL + result = TypeInfo::Integer32(); } + Register scratch = VirtualFrame::scratch0(); Register scratch2 = VirtualFrame::scratch1(); int shift_value = int_value & 0x1f; // least significant 5 bits -- v8-dev mailing list [email protected] http://groups.google.com/group/v8-dev
