Reviewers: Sven,
Description:
MIPS: small test-case fix for chaining of fixup position.
Add nops to the branch-delay slots of the 'beq' and 'bne' instructions
used in the test-case. Having a branch instruction in the branch-delay-slot
of another branch is undefined on mips.
In regular code we avoid this by using the Branch() macro-instruction which
fills the branch-delay-slot with nop() automatically, unless the programmer
asks to use it (via USE_BRANCH_DELAY).
There is more info about branch-delay-slots on this page, and in the ISA
reference also on the page:
https://github.com/paul99/v8m-rb/wiki/MIPS-instruction-set-and-v8
BUG=
TEST=
Please review this at http://codereview.chromium.org/7812019/
Affected files:
M test/cctest/test-assembler-mips.cc
Index: test/cctest/test-assembler-mips.cc
diff --git a/test/cctest/test-assembler-mips.cc
b/test/cctest/test-assembler-mips.cc
index
ca11a2ae1f16de3f2aed537e88564b9657e65910..cbaa3beb99f43f5f3924d13054f264bcb0ca1cd3
100644
--- a/test/cctest/test-assembler-mips.cc
+++ b/test/cctest/test-assembler-mips.cc
@@ -1268,7 +1268,9 @@ TEST(MIPS15) {
Label target;
__ beq(v0, v1, &target);
+ __ nop();
__ bne(v0, v1, &target);
+ __ nop();
__ bind(&target);
__ nop();
}
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