On 4/27/2013 9:22 AM, Vyacheslav Egorov wrote:
> > And therein lies the problem: x86-64 instruction set isn't
> compatible with IA64 instruction set
>
> That is exactly what we are talking about: it's instruction set that
> is the issue, not the amount of bits (32 vs. 64).

So, to move the discussion along: the code is 64bit clean, but there is
no IA64 machine code.

There is a Mips instruction set simulator. It's probably going to be the
case that it will have to be a starting point. Or, is the mismatch
between the RISC and VLIW too great to use that as a starting point?

Jeff Chimene
>
> Vyacheslav Egorov
>
>
> On Sat, Apr 27, 2013 at 6:18 PM, Jeffrey Chimene <[email protected]
> <mailto:[email protected]>> wrote:
>
>     On 4/27/2013 9:14 AM, Rodolph Perfetta wrote:
>>     In 2009 v8 didn't have a 64bits port, now as mentioned by
>>     Vyacheslav, it has (for intel x86-64). So the amount of bits is
>>     not a problem.
>
>     And therein lies the problem: x86-64 instruction set isn't
>     compatible with IA64 instruction set
>
>
>>
>>     On 27 April 2013 16:29, Jeffrey Chimene <[email protected]
>>     <mailto:[email protected]>> wrote:
>>
>>         On 4/27/2013 8:17 AM, Vyacheslav Egorov wrote:
>>>         Amount of bits is not an issue here at all, for example V8
>>>         already runs on x86-64 just fine.
>>         I should have been clearer. I'm referring to a thread from 2009
>>         
>> https://groups.google.com/forum/#!searchin/v8-dev/ia64/v8-dev/GuP1ZlPVIpE/uUUNjmXCJ-wJ
>>         
>> <https://groups.google.com/forum/#%21searchin/v8-dev/ia64/v8-dev/GuP1ZlPVIpE/uUUNjmXCJ-wJ>
>>>         Making V8 work on 64-bits is much much bigger than changing
>>>         some types
>>>         around and changing the scons.  It probably deserves some
>>>         fairly big
>>>         design discussions, and I would guess it would take at least
>>>         a few
>>>         months, and it will be hard not to fracture the code a
>>>         bunch, with
>>>         separate code for 32/64 bit (GC, object layout, etc). 
>>
>>         and in reply
>>
>>         I'm certainly not expecting that type changes will magically
>>         make this code 64-bit clean.  If that were true, it would've
>>         been done already.
>>
>>         If it would be better, I can do these changes out of tree and
>>         come back with things when I have them working.  My question
>>         from the previous email is whether or not generic changes
>>         would be accepted into the tree or not - if the answer is no,
>>         that's fine.
>>
>>>
>>>         Despite confusingly similar names ia32 and IA64 (Itanium)
>>>         are *very* different architectures.
>>         Agreed. The mode on the IA64 that executes 32 bit
>>         instructions isn't available on VMS
>>
>>
>>>
>>>         I'd say generating efficient code for IA64 is much harder
>>>         because compiler has to carefully schedule instructions in
>>>         instruction bundles (IA64 is VLIW) to saturate execution
>>>         units and avoid dreadful stalls.
>>         Agreed. That may be why IA64 hasn't been produced. OTOH. it
>>         may be that the V8 code isn't 64-bit clean.
>>>
>>>         [though I heard that newest
>>>         Itanium micro-architecture actually is more forgiving to
>>>         poor scheduling and is capable of a good built-in
>>>         out-of-order execution, but I am not closely following this
>>>         things so I might be wrong]
>>>
>>>
>>>
>>>
>>>
>>>         Vyacheslav Egorov
>>>
>>>
>>>         On Sat, Apr 27, 2013 at 4:50 AM, <[email protected]
>>>         <mailto:[email protected]>> wrote:
>>>
>>>             Hi Folks,
>>>
>>>             I'd like to spearhead a port to IA64 on OpenVMS, which
>>>             does not support IA32 subset. Am I correct that this is
>>>             a deal breaker in that true 64 bit is a major initiative?
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