Revision: 17479
Author: [email protected]
Date: Tue Nov 5 12:04:46 2013 UTC
Log: Introduce orps for IA32/X64
BUG=
[email protected]
Review URL: https://codereview.chromium.org/53573004
http://code.google.com/p/v8/source/detail?r=17479
Modified:
/branches/bleeding_edge/src/ia32/assembler-ia32.cc
/branches/bleeding_edge/src/ia32/assembler-ia32.h
/branches/bleeding_edge/src/ia32/codegen-ia32.cc
/branches/bleeding_edge/src/ia32/disasm-ia32.cc
/branches/bleeding_edge/src/ia32/lithium-codegen-ia32.cc
/branches/bleeding_edge/src/ia32/lithium-gap-resolver-ia32.cc
/branches/bleeding_edge/src/x64/assembler-x64.cc
/branches/bleeding_edge/src/x64/assembler-x64.h
/branches/bleeding_edge/src/x64/disasm-x64.cc
/branches/bleeding_edge/src/x64/lithium-codegen-x64.cc
/branches/bleeding_edge/src/x64/lithium-gap-resolver-x64.cc
/branches/bleeding_edge/test/cctest/test-disasm-ia32.cc
/branches/bleeding_edge/test/cctest/test-disasm-x64.cc
=======================================
--- /branches/bleeding_edge/src/ia32/assembler-ia32.cc Mon Oct 28 10:38:40
2013 UTC
+++ /branches/bleeding_edge/src/ia32/assembler-ia32.cc Tue Nov 5 12:04:46
2013 UTC
@@ -2057,6 +2057,22 @@
EMIT(0x57);
emit_sse_operand(dst, src);
}
+
+
+void Assembler::andps(XMMRegister dst, XMMRegister src) {
+ EnsureSpace ensure_space(this);
+ EMIT(0x0F);
+ EMIT(0x54);
+ emit_sse_operand(dst, src);
+}
+
+
+void Assembler::orps(XMMRegister dst, XMMRegister src) {
+ EnsureSpace ensure_space(this);
+ EMIT(0x0F);
+ EMIT(0x56);
+ emit_sse_operand(dst, src);
+}
void Assembler::xorps(XMMRegister dst, XMMRegister src) {
@@ -2342,14 +2358,6 @@
emit_sse_operand(src, dst);
EMIT(imm8);
}
-
-
-void Assembler::andps(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x0F);
- EMIT(0x54);
- emit_sse_operand(dst, src);
-}
void Assembler::pand(XMMRegister dst, XMMRegister src) {
=======================================
--- /branches/bleeding_edge/src/ia32/assembler-ia32.h Mon Oct 28 10:38:40
2013 UTC
+++ /branches/bleeding_edge/src/ia32/assembler-ia32.h Tue Nov 5 12:04:46
2013 UTC
@@ -1020,6 +1020,7 @@
// SSE instructions
void andps(XMMRegister dst, XMMRegister src);
void xorps(XMMRegister dst, XMMRegister src);
+ void orps(XMMRegister dst, XMMRegister src);
// SSE2 instructions
void cvttss2si(Register dst, const Operand& src);
=======================================
--- /branches/bleeding_edge/src/ia32/codegen-ia32.cc Thu Oct 24 10:50:35
2013 UTC
+++ /branches/bleeding_edge/src/ia32/codegen-ia32.cc Tue Nov 5 12:04:46
2013 UTC
@@ -1110,7 +1110,7 @@
__ pshufd(input, input, static_cast<uint8_t>(0xe1)); // Order: 11 10 00
01
__ movsd(double_scratch, Operand::StaticArray(
temp2, times_8, ExternalReference::math_exp_log_table()));
- __ por(input, double_scratch);
+ __ orps(input, double_scratch);
__ mulsd(result, input);
__ bind(&done);
}
=======================================
--- /branches/bleeding_edge/src/ia32/disasm-ia32.cc Mon Oct 28 10:38:40
2013 UTC
+++ /branches/bleeding_edge/src/ia32/disasm-ia32.cc Tue Nov 5 12:04:46
2013 UTC
@@ -1050,6 +1050,14 @@
NameOfXMMRegister(regop),
NameOfXMMRegister(rm));
data++;
+ } else if (f0byte == 0x56) {
+ data += 2;
+ int mod, regop, rm;
+ get_modrm(*data, &mod, ®op, &rm);
+ AppendToBuffer("orps %s,%s",
+ NameOfXMMRegister(regop),
+ NameOfXMMRegister(rm));
+ data++;
} else if (f0byte == 0x57) {
data += 2;
int mod, regop, rm;
=======================================
--- /branches/bleeding_edge/src/ia32/lithium-codegen-ia32.cc Thu Oct 31
10:18:51 2013 UTC
+++ /branches/bleeding_edge/src/ia32/lithium-codegen-ia32.cc Tue Nov 5
12:04:46 2013 UTC
@@ -1958,7 +1958,7 @@
XMMRegister xmm_scratch = double_scratch0();
__ Set(temp, Immediate(lower));
__ movd(xmm_scratch, Operand(temp));
- __ por(res, xmm_scratch);
+ __ orps(res, xmm_scratch);
}
}
}
@@ -2184,7 +2184,7 @@
__ ucomisd(left_reg, left_reg); // NaN check.
__ j(parity_even, &return_left, Label::kNear); // left == NaN.
__ bind(&return_right);
- __ movsd(left_reg, right_reg);
+ __ movaps(left_reg, right_reg);
__ bind(&return_left);
}
@@ -3995,7 +3995,7 @@
// CVTTSD2SI rounds towards zero, we use ceil(x - (-0.5)) and then
// compare and compensate.
- __ movsd(input_temp, input_reg); // Do not alter input_reg.
+ __ movaps(input_temp, input_reg); // Do not alter input_reg.
__ subsd(input_temp, xmm_scratch);
__ cvttsd2si(output_reg, Operand(input_temp));
// Catch minint due to overflow, and to prevent overflow when
compensating.
=======================================
--- /branches/bleeding_edge/src/ia32/lithium-gap-resolver-ia32.cc Fri Oct
18 10:54:45 2013 UTC
+++ /branches/bleeding_edge/src/ia32/lithium-gap-resolver-ia32.cc Tue Nov
5 12:04:46 2013 UTC
@@ -488,7 +488,7 @@
cgen_->ToOperand(source->IsDoubleRegister() ? destination :
source);
__ movsd(xmm0, other);
__ movsd(other, reg);
- __ movsd(reg, Operand(xmm0));
+ __ movaps(reg, xmm0);
} else if (source->IsDoubleStackSlot() &&
destination->IsDoubleStackSlot()) {
CpuFeatureScope scope(cgen_->masm(), SSE2);
// Double-width memory-to-memory. Spill on demand to use a general
=======================================
--- /branches/bleeding_edge/src/x64/assembler-x64.cc Mon Oct 28 10:38:40
2013 UTC
+++ /branches/bleeding_edge/src/x64/assembler-x64.cc Tue Nov 5 12:04:46
2013 UTC
@@ -2485,6 +2485,24 @@
emit(0x54);
emit_sse_operand(dst, src);
}
+
+
+void Assembler::orps(XMMRegister dst, XMMRegister src) {
+ EnsureSpace ensure_space(this);
+ emit_optional_rex_32(dst, src);
+ emit(0x0F);
+ emit(0x56);
+ emit_sse_operand(dst, src);
+}
+
+
+void Assembler::xorps(XMMRegister dst, XMMRegister src) {
+ EnsureSpace ensure_space(this);
+ emit_optional_rex_32(dst, src);
+ emit(0x0F);
+ emit(0x57);
+ emit_sse_operand(dst, src);
+}
// SSE 2 operations.
@@ -2916,15 +2934,6 @@
emit(0x57);
emit_sse_operand(dst, src);
}
-
-
-void Assembler::xorps(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- emit_optional_rex_32(dst, src);
- emit(0x0F);
- emit(0x57);
- emit_sse_operand(dst, src);
-}
void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
=======================================
--- /branches/bleeding_edge/src/x64/assembler-x64.h Mon Oct 28 10:38:40
2013 UTC
+++ /branches/bleeding_edge/src/x64/assembler-x64.h Tue Nov 5 12:04:46
2013 UTC
@@ -1355,8 +1355,9 @@
void cvttss2si(Register dst, XMMRegister src);
void cvtlsi2ss(XMMRegister dst, Register src);
+ void andps(XMMRegister dst, XMMRegister src);
+ void orps(XMMRegister dst, XMMRegister src);
void xorps(XMMRegister dst, XMMRegister src);
- void andps(XMMRegister dst, XMMRegister src);
void movmskps(Register dst, XMMRegister src);
=======================================
--- /branches/bleeding_edge/src/x64/disasm-x64.cc Mon Oct 28 10:38:40 2013
UTC
+++ /branches/bleeding_edge/src/x64/disasm-x64.cc Tue Nov 5 12:04:46 2013
UTC
@@ -1261,12 +1261,19 @@
current += PrintOperands(idesc.mnem, idesc.op_order_, current);
} else if (opcode == 0x54) {
- // xorps xmm, xmm/m128
+ // andps xmm, xmm/m128
int mod, regop, rm;
get_modrm(*current, &mod, ®op, &rm);
AppendToBuffer("andps %s,", NameOfXMMRegister(regop));
current += PrintRightXMMOperand(current);
+ } else if (opcode == 0x56) {
+ // orps xmm, xmm/m128
+ int mod, regop, rm;
+ get_modrm(*current, &mod, ®op, &rm);
+ AppendToBuffer("orps %s,", NameOfXMMRegister(regop));
+ current += PrintRightXMMOperand(current);
+
} else if (opcode == 0x57) {
// xorps xmm, xmm/m128
int mod, regop, rm;
=======================================
--- /branches/bleeding_edge/src/x64/lithium-codegen-x64.cc Thu Oct 31
10:18:51 2013 UTC
+++ /branches/bleeding_edge/src/x64/lithium-codegen-x64.cc Tue Nov 5
12:04:46 2013 UTC
@@ -1771,7 +1771,7 @@
__ j(not_equal, &return_left, Label::kNear); // left == right != 0.
// At this point, both left and right are either 0 or -0.
if (operation == HMathMinMax::kMathMin) {
- __ orpd(left_reg, right_reg);
+ __ orps(left_reg, right_reg);
} else {
// Since we operate on +0 and/or -0, addsd and andsd have the same
effect.
__ addsd(left_reg, right_reg);
@@ -1782,7 +1782,7 @@
__ ucomisd(left_reg, left_reg); // NaN check.
__ j(parity_even, &return_left, Label::kNear);
__ bind(&return_right);
- __ movsd(left_reg, right_reg);
+ __ movaps(left_reg, right_reg);
__ bind(&return_left);
}
=======================================
--- /branches/bleeding_edge/src/x64/lithium-gap-resolver-x64.cc Thu Oct 24
02:12:51 2013 UTC
+++ /branches/bleeding_edge/src/x64/lithium-gap-resolver-x64.cc Tue Nov 5
12:04:46 2013 UTC
@@ -305,7 +305,7 @@
Operand other_operand = cgen_->ToOperand(other);
__ movsd(xmm0, other_operand);
__ movsd(other_operand, reg);
- __ movsd(reg, xmm0);
+ __ movaps(reg, xmm0);
} else {
// No other combinations are possible.
=======================================
--- /branches/bleeding_edge/test/cctest/test-disasm-ia32.cc Mon Oct 28
10:38:40 2013 UTC
+++ /branches/bleeding_edge/test/cctest/test-disasm-ia32.cc Tue Nov 5
12:04:46 2013 UTC
@@ -371,6 +371,7 @@
__ cmpltsd(xmm0, xmm1);
__ andps(xmm0, xmm1);
+ __ orps(xmm0, xmm1);
__ andpd(xmm0, xmm1);
__ psllq(xmm0, 17);
__ psllq(xmm0, xmm1);
=======================================
--- /branches/bleeding_edge/test/cctest/test-disasm-x64.cc Mon Oct 28
10:38:40 2013 UTC
+++ /branches/bleeding_edge/test/cctest/test-disasm-x64.cc Tue Nov 5
12:04:46 2013 UTC
@@ -343,6 +343,8 @@
__ movaps(xmm0, xmm1);
__ andps(xmm0, xmm1);
+ __ orps(xmm0, xmm1);
+ __ xorps(xmm0, xmm1);
}
// SSE 2 instructions
{
--
--
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