We made a conscious decision to do things that way. On ARM, the registers
are
pushed such that the lowest-indexed register gets the lowest address.
Pop(r0,
r1) and Pop(r1, r0) do the same thing (though there may be a warning in
V8).
I don't think this is correct. On Arm Pop always pops the rightmost
register
first (from lower address), so Pop(r0, r1) and Pop(r1, r0) are different
(but
only Pop(r0, r1) can use the more efficient ldm instruction).
On A64, that isn't the case, and we wanted the following sequences to be
equivalent:
Push(xa);
Push(xb);
Push(xa, xb);
That is, Push and Pop can be split into several calls, but the order of
operations always agrees with reading order. With this scheme, Pop has to
work
in the opposite order. It would be easy to make PopQueued() reverse the
list
automatically, but it would then operate differently from Pop(), as you
noted.
Does that argument make sense? We spent some time thinking about it when
we
started the port but that doesn't mean we can't change things.
I can see the argument, but personally I think having Push and Pop be
symmetrical (in terms of the arguments to a Pop() being the same as the
matching
call to Push()) is more readable and less-error prone than the other way
around
(to check whether the push/pop is matching you only have to compare the set
of
arguments, not reverse them). I also think it is much more important to be
consistent across the architectures if possible - so if we do decided to
move to
this model, we should change arm, mips and any other arches which do
multi-pop/push to be the same.
Do any other V8 team members have an opinion?
https://codereview.chromium.org/169533002/
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