> So for this particular instruction it generates 2 READ events and 1 WRITE
> event.

Yes.  It translates all atomic operations into C-A-S sequences.

> But there would be only 1 READ and 1 WRITE followed by a flush when it runs
> on a processor. Am I right?

I have no idea how a processor would actually interpret an atomic operation;
whether it would interpret it as a read, a write and a flush, or something
else entirely.

J

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