[virtio-dev] RE: [PATCH v2 0/2] transport-pci: Introduce legacy registers access using AQ

Thu, 11 May 2023 09:00:33 -0700 


> From: Michael S. Tsirkin <[email protected]>
> Sent: Thursday, May 11, 2023 9:39 AM
> 
> On Thu, May 11, 2023 at 01:28:40PM +0000, Parav Pandit wrote:
> > This is not the objective to transport all PCI virtio fields over AQ.
> > Transport VQ commands proposal commands and commands in this proposal
> are just fine the way there without quoting it as "transport".
> 
> I mean, it's a transport in a sense of where it will reside in e.g.
> linux virtio stack - below virtio core.

Not sure I understand, if you are asking for SF/SIOV virtio device, it should 
have its own communication path from driver to device without going through the 
PF AQ.
Because it has no backward compatibility baggage.
There is no need for PF based AQ for it.

PF based AQ is only needed for exposing a backward compatible guest VM facing 
PCI or MMIO virtio device whose backend is either PCI VF or SF/SIOV virtio 
passthrough device.
Such backward compatible composition requirement and above SIOV device are two 
very different requirements.

> We don't save much code there by reusing the same register layout of legacy
> pci.
> But let's at least make this feature complete, and then we'll see whether it 
> is
> cleaner to reuse legacy layout or build a new one.
> 
> --
> MST


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