On Mon, Oct 26, 2026 at 11:51:33AM +0530, Jayant Shekhar wrote:
> Hawi display hardware is owned by DCP firmware, so the platform device tree
> must describe the Qualcomm transport wrapper, firmware display subsystem,
> power-notify channel, IOMMU contexts, and display graph used by the MSM DRM
> driver.
> 
> Describe the Qualcomm DCP transport and its VirtIO-MMIO child,
> the IPCC power-notify channel, IOMMU assignments, firmware-visible IOVA
> range, and DSI display endpoints on Hawi. Enable the DCP display device on
> the Hawi MTP platform.
> 
> Assisted-by: LLM
> Signed-off-by: Jayant Shekhar <[email protected]>
> ---
>  arch/arm64/boot/dts/qcom/hawi-mtp.dts | 129 
> ++++++++++++++++++++++++++++++++++
>  arch/arm64/boot/dts/qcom/hawi.dtsi    |  40 +++++++++++
>  2 files changed, 169 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/hawi-mtp.dts 
> b/arch/arm64/boot/dts/qcom/hawi-mtp.dts
> index c38e5fab7a2c..a27003f69d02 100644
> --- a/arch/arm64/boot/dts/qcom/hawi-mtp.dts
> +++ b/arch/arm64/boot/dts/qcom/hawi-mtp.dts
> @@ -34,6 +34,18 @@ chosen {
>               stdout-path = "serial0:115200n8";
>       };
>  
> +     display_panel_vdd: regulator-display-panel-vdd {
> +             compatible = "regulator-fixed";
> +             regulator-name = "display-panel-vdd";

Is it the actual name in the schematics?

> +             regulator-min-microvolt = <1100000>;
> +             regulator-max-microvolt = <1100000>;
> +             gpio = <&pmd8028_e1_gpios 2 GPIO_ACTIVE_HIGH>;
> +             enable-active-high;
> +             regulator-boot-on;
> +             pinctrl-0 = <&sde_disp0_vdd_active>;
> +             pinctrl-names = "default";
> +     };
> +
>       clocks {
>               bi_tcxo_ao_div2: bi-tcxo-ao-div2-clk {
>                       compatible = "fixed-factor-clock";
> @@ -142,6 +154,7 @@ sdcard_vdd_3p0: sdcard-vdd-3p0 {
>  
>               vin-supply = <&vreg_bob1>;
>       };
> +

Unrelated

>  };
>  
>  &apps_rsc {

[..]

> +&tlmm {
> +     sde_te_active: sde-te-active-state {
> +             pins = "gpio86";
> +             function = "mdp_vsync";
> +             drive-strength = <2>;
> +             bias-pull-down;
> +     };
> +
> +     sde_te_suspend: sde-te-suspend-state {
> +             pins = "gpio86";
> +             function = "mdp_vsync";
> +             drive-strength = <2>;
> +             bias-pull-down;
> +     };

What's the difference from the previous entry?

> +
> +     sde_esync0_suspend: sde-esync0-suspend-state {
> +             pins = "gpio88";
> +             function = "mdp_esync0";
> +             drive-strength = <2>;
> +             bias-pull-down;
> +     };
> +
> +     sde_dsi_active: sde-dsi-active-state {
> +             pins = "gpio211";
> +             function = "gpio";
> +             drive-strength = <8>;
> +             bias-disable;
> +     };
> +
> +     sde_dsi_suspend: sde-dsi-suspend-state {
> +             pins = "gpio211";
> +             function = "gpio";
> +             drive-strength = <2>;
> +             bias-pull-down;
> +     };

What is it used for? I don't see GPIO 211 to be used. GPIO 210 is used
for panel reset.

> +};
> diff --git a/arch/arm64/boot/dts/qcom/hawi.dtsi 
> b/arch/arm64/boot/dts/qcom/hawi.dtsi
> index 6b0a0ff0faa4..836970cdef71 100644
> --- a/arch/arm64/boot/dts/qcom/hawi.dtsi
> +++ b/arch/arm64/boot/dts/qcom/hawi.dtsi
> @@ -6841,4 +6841,44 @@ timer {
>                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
>                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
>       };
> +
> +     dcp: virtio@9be8000 {
> +             compatible = "qcom,dcp-virtio";
> +             reg = <0x0 0x09be8000 0x0 0x1000>;
> +             interrupts-extended = <&intc GIC_ESPI 956 IRQ_TYPE_LEVEL_HIGH>,
> +                                           <&ipcc 13 5 IRQ_TYPE_EDGE_RISING>;

Align properly

> +             iommus = <&apps_smmu 0x15a3 0x0>;
> +             iommu-ranges = <0x0 0x84000000 0x0 0x04000000>;
> +             dma-coherent;
> +             mboxes = <&ipcc 13 5>;
> +             mbox-names = "dcp-power-tx";
> +
> +             dcp-subsystem {
> +                     compatible = "virtio,device34";
> +
> +                     iommus = <&apps_smmu 0x400 0x2>;
> +
> +                     #address-cells = <1>;
> +                     #size-cells = <0>;
> +
> +                     ports {
> +                             #address-cells = <1>;
> +                             #size-cells = <0>;
> +
> +                             port@0 {
> +                                     reg = <0>;
> +                                     dcp_intf0_out: endpoint {
> +

No need for an empty line.

> +                                     };
> +                             };
> +
> +                     };
> +
> +                     dcp_dsi0: dsi@0 {
> +                             reg = <0>;
> +                             #address-cells = <1>;
> +                             #size-cells = <0>;
> +                     };
> +             };
> +     };
>  };
> 
> -- 
> 2.43.0
> 

-- 
With best wishes
Dmitry

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