One thing rolling around the newest gcc's is SSE support, which means that the compiler replaces the mostly broken x87 FP stack with the SSE instructions that allow more then one fp operation per cycle. Apparently increases of 100-200% have been seen, pretty cool stuff. AMD has announced future athlons (palamino) will include SSE support. -- Bill
- Re: [vox-tech] gcc 3.0 Bill Broadley
- Re: [vox-tech] gcc 3.0 Harry Souders
- Re: [vox-tech] gcc 3.0 Bill Broadley
