[webkit-changes] [149634] trunk/Source/JavaScriptCore

Mon, 06 May 2013 13:26:49 -0700

Title: [149634] trunk/Source/_javascript_Core
Revision
149634
Author
[email protected]
Date
2013-05-06 13:28:31 -0700 (Mon, 06 May 2013)

Log Message

Misc bugfix and cleaning in sh4 base JIT.
https://bugs.webkit.org/show_bug.cgi?id=115627

Patch by Julien Brianceau <[email protected]> on 2013-05-06
Reviewed by Oliver Hunt.

Get rid of loadX(RegisterID r0, RegisterID src, RegisterID dest) functions.
Remove misplaced extuw() implementation from MacroAssemblerSH4.
Add movbRegMemr0 and movwRegMemr0 functions in SH4Assembler.

* assembler/MacroAssemblerSH4.h:
(JSC::MacroAssemblerSH4::add32): Skip operation when first operand is a zero immediate.
(JSC::MacroAssemblerSH4::sub32): Skip operation when first operand is a zero immediate.
(JSC::MacroAssemblerSH4::load32): Fix wrong usage of r0 register.
(JSC::MacroAssemblerSH4::load8Signed): Handle "base == r0" case.
(MacroAssemblerSH4):
(JSC::MacroAssemblerSH4::load16): Handle "base == r0" case.
(JSC::MacroAssemblerSH4::load16Unaligned): Use extuw() implementation from SH4Assembler.
(JSC::MacroAssemblerSH4::load16Signed): Cosmetic change.
(JSC::MacroAssemblerSH4::store8): Fix unhandled BaseIndex offset and handle (base == r0) case.
(JSC::MacroAssemblerSH4::store16): Fix unhandled BaseIndex offset and handle (base == r0) case.
(JSC::MacroAssemblerSH4::store32):
* assembler/SH4Assembler.h:
(JSC::SH4Assembler::movwRegMemr0):
(SH4Assembler):
(JSC::SH4Assembler::movbRegMemr0):
(JSC::SH4Assembler::placeConstantPoolBarrier): Cosmetic change.
(JSC::SH4Assembler::maxJumpReplacementSize):
(JSC::SH4Assembler::replaceWithJump): Correct branch range and save an opcode.
(JSC::SH4Assembler::printInstr):

Modified Paths

Diff

Modified: trunk/Source/_javascript_Core/ChangeLog (149633 => 149634)


--- trunk/Source/_javascript_Core/ChangeLog	2013-05-06 20:17:43 UTC (rev 149633)
+++ trunk/Source/_javascript_Core/ChangeLog	2013-05-06 20:28:31 UTC (rev 149634)
@@ -1,3 +1,35 @@
+2013-05-06  Julien Brianceau  <[email protected]>
+
+        Misc bugfix and cleaning in sh4 base JIT.
+        https://bugs.webkit.org/show_bug.cgi?id=115627
+
+        Reviewed by Oliver Hunt.
+
+        Get rid of loadX(RegisterID r0, RegisterID src, RegisterID dest) functions.
+        Remove misplaced extuw() implementation from MacroAssemblerSH4.
+        Add movbRegMemr0 and movwRegMemr0 functions in SH4Assembler.
+
+        * assembler/MacroAssemblerSH4.h:
+        (JSC::MacroAssemblerSH4::add32): Skip operation when first operand is a zero immediate.
+        (JSC::MacroAssemblerSH4::sub32): Skip operation when first operand is a zero immediate.
+        (JSC::MacroAssemblerSH4::load32): Fix wrong usage of r0 register.
+        (JSC::MacroAssemblerSH4::load8Signed): Handle "base == r0" case.
+        (MacroAssemblerSH4):
+        (JSC::MacroAssemblerSH4::load16): Handle "base == r0" case.
+        (JSC::MacroAssemblerSH4::load16Unaligned): Use extuw() implementation from SH4Assembler.
+        (JSC::MacroAssemblerSH4::load16Signed): Cosmetic change.
+        (JSC::MacroAssemblerSH4::store8): Fix unhandled BaseIndex offset and handle (base == r0) case.
+        (JSC::MacroAssemblerSH4::store16): Fix unhandled BaseIndex offset and handle (base == r0) case.
+        (JSC::MacroAssemblerSH4::store32):
+        * assembler/SH4Assembler.h:
+        (JSC::SH4Assembler::movwRegMemr0):
+        (SH4Assembler):
+        (JSC::SH4Assembler::movbRegMemr0):
+        (JSC::SH4Assembler::placeConstantPoolBarrier): Cosmetic change.
+        (JSC::SH4Assembler::maxJumpReplacementSize):
+        (JSC::SH4Assembler::replaceWithJump): Correct branch range and save an opcode.
+        (JSC::SH4Assembler::printInstr):
+
 2013-05-06  Anders Carlsson  <[email protected]>
 
         Stop using WTF::deleteAllValues in _javascript_Core

Modified: trunk/Source/_javascript_Core/assembler/MacroAssemblerSH4.h (149633 => 149634)


--- trunk/Source/_javascript_Core/assembler/MacroAssemblerSH4.h	2013-05-06 20:17:43 UTC (rev 149633)
+++ trunk/Source/_javascript_Core/assembler/MacroAssemblerSH4.h	2013-05-06 20:28:31 UTC (rev 149634)
@@ -110,6 +110,9 @@
 
     void add32(TrustedImm32 imm, RegisterID dest)
     {
+        if (!imm.m_value)
+            return;
+
         if (m_assembler.isImmediate(imm.m_value)) {
             m_assembler.addlImm8r(imm.m_value, dest);
             return;
@@ -130,6 +133,9 @@
 
     void add32(TrustedImm32 imm, Address address)
     {
+        if (!imm.m_value)
+            return;
+
         RegisterID scr = claimScratch();
         load32(address, scr);
         add32(imm, scr);
@@ -325,6 +331,9 @@
 
     void sub32(TrustedImm32 imm, AbsoluteAddress address)
     {
+        if (!imm.m_value)
+            return;
+
         RegisterID result = claimScratch();
         RegisterID scratchReg = claimScratch();
 
@@ -345,6 +354,9 @@
 
     void add32(TrustedImm32 imm, AbsoluteAddress address)
     {
+        if (!imm.m_value)
+            return;
+
         RegisterID result = claimScratch();
         RegisterID scratchReg = claimScratch();
 
@@ -393,6 +405,9 @@
 
     void sub32(TrustedImm32 imm, RegisterID dest)
     {
+        if (!imm.m_value)
+            return;
+
         if (m_assembler.isImmediate(-imm.m_value)) {
             m_assembler.addlImm8r(-imm.m_value, dest);
             return;
@@ -629,20 +644,15 @@
             return;
         }
 
-        if ((dest == SH4Registers::r0) && (dest != base)) {
-            m_assembler.loadConstant((offset), dest);
-            m_assembler.movlR0mr(base, dest);
-            return;
-        }
+        RegisterID scr = (dest == base) ? claimScratch() : dest;
 
-        RegisterID scr;
-        if (dest == base)
-            scr = claimScratch();
-        else
-            scr = dest;
         m_assembler.loadConstant(offset, scr);
-        m_assembler.addlRegReg(base, scr);
-        m_assembler.movlMemReg(scr, dest);
+        if (base == SH4Registers::r0)
+            m_assembler.movlR0mr(scr, dest);
+        else {
+            m_assembler.addlRegReg(base, scr);
+            m_assembler.movlMemReg(scr, dest);
+        }
 
         if (dest == base)
             releaseScratch(scr);
@@ -660,18 +670,18 @@
             return;
         }
 
-        if (base != dest) {
-            m_assembler.loadConstant(offset, dest);
-            m_assembler.addlRegReg(base, dest);
-            m_assembler.movbMemReg(dest, dest);
-            return;
-        }
+        RegisterID scr = (dest == base) ? claimScratch() : dest;
 
-        RegisterID scr = claimScratch();
         m_assembler.loadConstant(offset, scr);
-        m_assembler.addlRegReg(base, scr);
-        m_assembler.movbMemReg(scr, dest);
-        releaseScratch(scr);
+        if (base == SH4Registers::r0)
+            m_assembler.movbR0mr(scr, dest);
+        else {
+            m_assembler.addlRegReg(base, scr);
+            m_assembler.movbMemReg(scr, dest);
+        }
+
+        if (dest == base)
+            releaseScratch(scr);
     }
 
     void load8(RegisterID base, int offset, RegisterID dest)
@@ -680,12 +690,6 @@
         m_assembler.extub(dest, dest);
     }
 
-    void load32(RegisterID r0, RegisterID src, RegisterID dst)
-    {
-        ASSERT(r0 == SH4Registers::r0);
-        m_assembler.movlR0mr(src, dst);
-    }
-
     void load32(RegisterID src, RegisterID dst)
     {
         m_assembler.movlMemReg(src, dst);
@@ -695,35 +699,33 @@
     {
         if (!address.offset) {
             m_assembler.movwMemReg(address.base, dest);
-            extuw(dest, dest);
+            m_assembler.extuw(dest, dest);
             return;
         }
 
         if ((address.offset > 0) && (address.offset <= 30) && (dest == SH4Registers::r0)) {
             m_assembler.movwMemReg(address.offset >> 1, address.base, dest);
-            extuw(dest, dest);
+            m_assembler.extuw(dest, dest);
             return;
         }
 
-        if (address.base != dest) {
-            m_assembler.loadConstant(address.offset, dest);
-            m_assembler.addlRegReg(address.base, dest);
-            m_assembler.movwMemReg(dest, dest);
-            extuw(dest, dest);
-            return;
-        }
+        RegisterID scr = (dest == address.base) ? claimScratch() : dest;
 
-        RegisterID scr = claimScratch();
         m_assembler.loadConstant(address.offset, scr);
-        m_assembler.addlRegReg(address.base, scr);
-        m_assembler.movwMemReg(scr, dest);
-        extuw(dest, dest);
-        releaseScratch(scr);
+        if (address.base == SH4Registers::r0)
+            m_assembler.movwR0mr(scr, dest);
+        else {
+            m_assembler.addlRegReg(address.base, scr);
+            m_assembler.movwMemReg(scr, dest);
+        }
+        m_assembler.extuw(dest, dest);
+
+        if (dest == address.base)
+            releaseScratch(scr);
     }
 
     void load16Unaligned(BaseIndex address, RegisterID dest)
     {
-
         RegisterID scr = claimScratch();
         RegisterID scr1 = claimScratch();
 
@@ -747,7 +749,7 @@
     void load16(RegisterID src, RegisterID dest)
     {
         m_assembler.movwMemReg(src, dest);
-        extuw(dest, dest);
+        m_assembler.extuw(dest, dest);
     }
 
     void load16Signed(RegisterID src, RegisterID dest)
@@ -755,21 +757,14 @@
         m_assembler.movwMemReg(src, dest);
     }
 
-    void load16(RegisterID r0, RegisterID src, RegisterID dest)
+    void load16(BaseIndex address, RegisterID dest)
     {
-        ASSERT(r0 == SH4Registers::r0);
-        m_assembler.movwR0mr(src, dest);
-        extuw(dest, dest);
+        load16Signed(address, dest);
+        m_assembler.extuw(dest, dest);
     }
 
-    void load16Signed(RegisterID r0, RegisterID src, RegisterID dest)
+    void load16Signed(BaseIndex address, RegisterID dest)
     {
-        ASSERT(r0 == SH4Registers::r0);
-        m_assembler.movwR0mr(src, dest);
-    }
-
-    void load16(BaseIndex address, RegisterID dest)
-    {
         RegisterID scr = claimScratch();
 
         move(address.index, scr);
@@ -777,96 +772,76 @@
 
         if (address.offset)
             add32(TrustedImm32(address.offset), scr);
+
         if (address.base == SH4Registers::r0)
-            load16(address.base, scr, dest);
+            m_assembler.movwR0mr(scr, dest);
         else {
             add32(address.base, scr);
-            load16(scr, dest);
+            load16Signed(scr, dest);
         }
 
         releaseScratch(scr);
     }
 
-    void load16Signed(BaseIndex address, RegisterID dest)
+    void store8(RegisterID src, BaseIndex address)
     {
         RegisterID scr = claimScratch();
 
         move(address.index, scr);
         lshift32(TrustedImm32(address.scale), scr);
+        add32(TrustedImm32(address.offset), scr);
 
-        if (address.offset)
-            add32(TrustedImm32(address.offset), scr);
         if (address.base == SH4Registers::r0)
-            load16Signed(address.base, scr, dest);
+            m_assembler.movbRegMemr0(src, scr);
         else {
             add32(address.base, scr);
-            load16Signed(scr, dest);
+            m_assembler.movbRegMem(src, scr);
         }
 
         releaseScratch(scr);
     }
 
-    void store8(RegisterID src, BaseIndex address)
-    {
-        RegisterID scr = claimScratch();
-
-        move(address.index, scr);
-        lshift32(TrustedImm32(address.scale), scr);
-        add32(address.base, scr);
-
-        m_assembler.movbRegMem(src, scr);
-
-        releaseScratch(scr);
-    }
-
     void store16(RegisterID src, BaseIndex address)
     {
         RegisterID scr = claimScratch();
 
         move(address.index, scr);
         lshift32(TrustedImm32(address.scale), scr);
-        add32(address.base, scr);
+        add32(TrustedImm32(address.offset), scr);
 
-        m_assembler.movwRegMem(src, scr);
+        if (address.base == SH4Registers::r0)
+            m_assembler.movwRegMemr0(src, scr);
+        else {
+            add32(address.base, scr);
+            m_assembler.movwRegMem(src, scr);
+        }
 
         releaseScratch(scr);
     }
 
     void store32(RegisterID src, ImplicitAddress address)
     {
-        RegisterID scr = claimScratch();
-        store32(src, address.offset, address.base, scr);
-        releaseScratch(scr);
-    }
-
-    void store32(RegisterID src, int offset, RegisterID base, RegisterID scr)
-    {
-        if (!offset) {
-            m_assembler.movlRegMem(src, base);
+        if (!address.offset) {
+            m_assembler.movlRegMem(src, address.base);
             return;
         }
 
-        if ((offset >= 0) && (offset < 64)) {
-            m_assembler.movlRegMem(src, offset >> 2, base);
+        if ((address.offset >= 0) && (address.offset < 64)) {
+            m_assembler.movlRegMem(src, address.offset >> 2, address.base);
             return;
         }
 
-        m_assembler.loadConstant(offset, scr);
-        if (scr == SH4Registers::r0) {
-            m_assembler.movlRegMemr0(src, base);
-            return;
+        RegisterID scr = claimScratch();
+        m_assembler.loadConstant(address.offset, scr);
+        if (address.base == SH4Registers::r0)
+            m_assembler.movlRegMemr0(src, scr);
+        else {
+            m_assembler.addlRegReg(address.base, scr);
+            m_assembler.movlRegMem(src, scr);
         }
-
-        m_assembler.addlRegReg(base, scr);
-        m_assembler.movlRegMem(src, scr);
+        releaseScratch(scr);
     }
 
-    void store32(RegisterID src, RegisterID offset, RegisterID base)
-    {
-        ASSERT(offset == SH4Registers::r0);
-        m_assembler.movlRegMemr0(src, base);
-    }
-
     void store32(RegisterID src, RegisterID dst)
     {
         m_assembler.movlRegMem(src, dst);
@@ -875,11 +850,9 @@
     void store32(TrustedImm32 imm, ImplicitAddress address)
     {
         RegisterID scr = claimScratch();
-        RegisterID scr1 = claimScratch();
         m_assembler.loadConstant(imm.m_value, scr);
-        store32(scr, address.offset, address.base, scr1);
+        store32(scr, address);
         releaseScratch(scr);
-        releaseScratch(scr1);
     }
 
     void store32(RegisterID src, BaseIndex address)
@@ -1575,11 +1548,6 @@
         m_assembler.loadConstant(imm.asIntptr(), dest);
     }
 
-    void extuw(RegisterID src, RegisterID dst)
-    {
-        m_assembler.extuw(src, dst);
-    }
-
     void compare32(RelationalCondition cond, RegisterID left, RegisterID right, RegisterID dest)
     {
         m_assembler.cmplRegReg(right, left, SH4Condition(cond));

Modified: trunk/Source/_javascript_Core/assembler/SH4Assembler.h (149633 => 149634)


--- trunk/Source/_javascript_Core/assembler/SH4Assembler.h	2013-05-06 20:17:43 UTC (rev 149633)
+++ trunk/Source/_javascript_Core/assembler/SH4Assembler.h	2013-05-06 20:28:31 UTC (rev 149634)
@@ -115,6 +115,7 @@
     MOVL_READ_OFFPC_OPCODE = 0xd000,
     MOVL_READ_OFFRM_OPCODE = 0x5000,
     MOVW_WRITE_RN_OPCODE = 0x2001,
+    MOVW_WRITE_R0RN_OPCODE = 0x0005,
     MOVW_READ_RM_OPCODE = 0x6001,
     MOVW_READ_R0RM_OPCODE = 0x000d,
     MOVW_READ_OFFRM_OPCODE = 0x8500,
@@ -1060,6 +1061,12 @@
         oneShortOp(opc);
     }
 
+    void movwRegMemr0(RegisterID src, RegisterID dst)
+    {
+        uint16_t opc = getOpcodeGroup1(MOVW_WRITE_R0RN_OPCODE, dst, src);
+        oneShortOp(opc);
+    }
+
     void movlRegMem(RegisterID src, int offset, RegisterID base)
     {
         ASSERT((offset <= 15) && (offset >= 0));
@@ -1126,6 +1133,12 @@
         oneShortOp(opc);
     }
 
+    void movbRegMemr0(RegisterID src, RegisterID dst)
+    {
+        uint16_t opc = getOpcodeGroup1(MOVB_WRITE_R0RN_OPCODE, dst, src);
+        oneShortOp(opc);
+    }
+
     void movlMemReg(RegisterID base, RegisterID dst)
     {
         uint16_t opc = getOpcodeGroup1(MOVL_READ_RM_OPCODE, dst, base);
@@ -1380,7 +1393,7 @@
 
     static SH4Buffer::TwoShorts placeConstantPoolBarrier(int offset)
     {
-        ASSERT(((offset >> 1) <=2047) && ((offset >> 1) >= -2048));
+        ASSERT(((offset >> 1) <= 2047) && ((offset >> 1) >= -2048));
 
         SH4Buffer::TwoShorts m_barrier;
         m_barrier.high = (BRA_OPCODE | (offset >> 1));
@@ -1474,7 +1487,7 @@
 
     static ptrdiff_t maxJumpReplacementSize()
     {
-        return sizeof(SH4Word) * 7;
+        return sizeof(SH4Word) * 6;
     }
 
     static void replaceWithJump(void *instructionStart, void *to)
@@ -1483,20 +1496,20 @@
         intptr_t difference = reinterpret_cast<intptr_t>(to) - (reinterpret_cast<intptr_t>(instruction) + 2 * sizeof(SH4Word));
         int nbinst = 0;
 
-        if ((difference >= -2048) && (difference <= 2047)) {
+        if ((difference >= -4096) && (difference <= 4094)) {
             instruction[0] = getOpcodeGroup6(BRA_OPCODE, difference >> 1);
             instruction[1] = NOP_OPCODE;
             cacheFlush(instruction, sizeof(SH4Word) * 2);
             return;
         }
 
-        if (reinterpret_cast<unsigned>(instruction) & 3)
-            instruction[nbinst++] = NOP_OPCODE;
-
         instruction[nbinst++] = getOpcodeGroup3(MOVL_READ_OFFPC_OPCODE, scratchReg2, 1);
         instruction[nbinst++] = getOpcodeGroup2(JMP_OPCODE, scratchReg2);
         instruction[nbinst++] = NOP_OPCODE;
-        instruction[nbinst++] = NOP_OPCODE;
+
+        if (!(reinterpret_cast<unsigned>(instruction) & 3))
+            instruction[nbinst++] = NOP_OPCODE;
+
         instruction[nbinst++] = reinterpret_cast<unsigned>(to) & 0xffff;
         instruction[nbinst++] = reinterpret_cast<unsigned>(to) >> 16;
         cacheFlush(instruction, sizeof(SH4Word) * nbinst);
@@ -1948,6 +1961,9 @@
         case MOVW_READ_R0RM_OPCODE:
             format = "    MOV.W @(R0, R%d), R%d\n";
             break;
+        case MOVW_WRITE_R0RN_OPCODE:
+            format = "    MOV.W R%d, @(R0, R%d)\n";
+            break;
         case EXTUB_OPCODE:
             format = "    EXTU.B R%d, R%d\n";
             break;

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