# HG changeset patch # User Murugan Vairavel <muru...@multicorewareinc.com> # Date 1383653218 -19800 # Tue Nov 05 17:36:58 2013 +0530 # Node ID 1f3de94bee30eebab7f10df37e674fa7360803b1 # Parent 8b4fe169680fba027b67d441fe9248a7b5694bd8 asm: pixel_add_pp routine for 8x4 block size
diff -r 8b4fe169680f -r 1f3de94bee30 source/common/x86/pixel-add8.asm --- a/source/common/x86/pixel-add8.asm Tue Nov 05 17:33:07 2013 +0530 +++ b/source/common/x86/pixel-add8.asm Tue Nov 05 17:36:58 2013 +0530 @@ -52,3 +52,41 @@ RET +;----------------------------------------------------------------------------- +; void pixel_add_pp_c_8x4(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1); +;----------------------------------------------------------------------------- +INIT_XMM sse2 +cglobal pixel_add_pp_8x4, 4, 6, 8, dest, deststride, src0, src1 + +mov r4d, r4m +mov r5d, r5m + +movh m0, [r2] +movh m1, [r3] + +movh m2, [r2 + r4] +movh m3, [r3 + r5] + +movh m4, [r2 + 2 * r4] +movh m5, [r3 + 2 * r5] + +lea r2, [r2 + 2 * r4] +lea r3, [r3 + 2 * r5] + +movh m6, [r2 + r4] +movh m7, [r3 + r5] + +paddusb m0, m1 +paddusb m2, m3 +paddusb m4, m5 +paddusb m6, m7 + +movh [r0], m0 +movh [r0 + r1], m2 +movh [r0 + 2 * r1], m4 + +lea r0, [r0 + 2 * r1] +movh [r0 + r1], m6 + +RET + _______________________________________________ x265-devel mailing list x265-devel@videolan.org https://mailman.videolan.org/listinfo/x265-devel
