# HG changeset patch # User Murugan Vairavel <muru...@multicorewareinc.com> # Date 1383653386 -19800 # Tue Nov 05 17:39:46 2013 +0530 # Node ID 264f215c3503097b8ec4cebfaade85caaa540048 # Parent 1f3de94bee30eebab7f10df37e674fa7360803b1 asm: pixel_add_pp routine for 8x6 block size
diff -r 1f3de94bee30 -r 264f215c3503 source/common/x86/pixel-add8.asm --- a/source/common/x86/pixel-add8.asm Tue Nov 05 17:36:58 2013 +0530 +++ b/source/common/x86/pixel-add8.asm Tue Nov 05 17:39:46 2013 +0530 @@ -90,3 +90,40 @@ RET +;----------------------------------------------------------------------------- +; void pixel_add_pp_c_8x6(pixel *dest, intptr_t destride, pixel *src0, pixel *src1, intptr_t srcstride0, intptr_t srcstride1); +;----------------------------------------------------------------------------- +%macro PIXELADD_PP_W8_H2 2 +INIT_XMM sse2 +cglobal pixel_add_pp_%1x%2, 4, 7, 4, dest, deststride, src0, src1 + +mov r4d, r4m +mov r5d, r5m +mov r6d, %2 + +.loop + + movh m0, [r2] + movh m1, [r3] + + movh m2, [r2 + r4] + movh m3, [r3 + r5] + + paddusb m0, m1 + paddusb m2, m3 + + movh [r0], m0 + movh [r0 + r1], m2 + + lea r2, [r2 + 2 * r4] + lea r3, [r3 + 2 * r5] + lea r0, [r0 + 2 * r1] + + sub r6d, 2 + +jnz .loop + +RET +%endmacro + +PIXELADD_PP_W8_H2 8, 6 _______________________________________________ x265-devel mailing list x265-devel@videolan.org https://mailman.videolan.org/listinfo/x265-devel
