An attempt to write access the register (i.e. GICR_PROPBASER, GICR_PENDBASER) which should be ignored (i.e. no virtual ITS present) causes the data about due to incorrect check at the write_ignore_64 label. The check should be inverted.
Fixes: c4d6bbdc12e5 ("xen/arm: vgic-v3: Support 32-bit access for 64-bit registers") Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshche...@epam.com> --- xen/arch/arm/vgic-v3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index 2eaa48fadb..b366b046a2 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -649,7 +649,7 @@ bad_width: return 0; write_ignore_64: - if ( vgic_reg64_check_access(dabt) ) goto bad_width; + if ( !vgic_reg64_check_access(dabt) ) goto bad_width; return 1; write_ignore_32: -- 2.34.1