Leonid Komarianskyi <leonid_komarians...@epam.com> writes:
> To properly deactivate guest interrupts and allow them to be retriggered > after the initial trigger, the LR needs to be updated. The current > implementation ignores interrupts outside the range specified by the mask > 0x3FF, which only covers IRQ numbers up to 1023. To enable processing of > eSPI interrupts, this patch updates the mask to 0x13FF. > > Signed-off-by: Leonid Komarianskyi <leonid_komarians...@epam.com> Reviewed-by: Volodymyr Babchuk <volodymyr_babc...@epam.com> > > --- > Changes in V2: > - remove unnecessary CONFIG_GICV3_ESPI ifdef guard > > Changes in V3: > - no changes > --- > xen/arch/arm/include/asm/gic_v3_defs.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/arch/arm/include/asm/gic_v3_defs.h > b/xen/arch/arm/include/asm/gic_v3_defs.h > index d38a3d08c7..ca403131bd 100644 > --- a/xen/arch/arm/include/asm/gic_v3_defs.h > +++ b/xen/arch/arm/include/asm/gic_v3_defs.h > @@ -207,7 +207,7 @@ > #define ICH_LR_VIRTUAL_SHIFT 0 > #define ICH_LR_CPUID_MASK 0x7 > #define ICH_LR_CPUID_SHIFT 10 > -#define ICH_LR_PHYSICAL_MASK 0x3ff > +#define ICH_LR_PHYSICAL_MASK 0x13ff > #define ICH_LR_PHYSICAL_SHIFT 32 > #define ICH_LR_STATE_MASK 0x3 > #define ICH_LR_STATE_SHIFT 62 -- WBR, Volodymyr
