Hi Bhupinder, On 17/07/17 14:06, Bhupinder Thakur wrote:
Add emulation code to emulate read/write access to pl011 registers and pl011 interrupts:- Emulate DR read/write by reading and writing from/to the IN and OUT ring buffers and raising an event to the backend when there is data in the OUT ring buffer and injecting an interrupt to the guest when there is data in the IN ring buffer - Other registers are related to interrupt management and essentially control when interrupts are delivered to the guest This patch implements the SBSA Generic UART which is a subset of ARM PL011 UART. The SBSA Generic UART is covered in Appendix B of https://static.docs.arm.com/den0029/a/Server_Base_System_Architecture_v3_1_ARM_DEN_0029A.pdf Signed-off-by: Bhupinder Thakur <bhupinder.tha...@linaro.org>
Acked-by: Julien Grall <julien.gr...@arm.com> Cheers, -- Julien Grall _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
