Hi Konrad,
On 15/08/16 16:17, Julien Grall wrote:
On 15/08/2016 01:07, Konrad Rzeszutek Wilk wrote:
+ case R_AARCH64_ADR_PREL_PG_HI21:
+ val = (val & ~0xfff) - ((u64)dest & ~0xfff);
+ err = reloc_insn_imm(dest, val, 12, 21,
AARCH64_INSN_IMM_ADR);
+ break;
Hmmm, I think we want to avoid the payload having
R_AARCH64_ADR_PREL_PG_HI21* relocations due to the erratum #843419 on
some Cortex-A53.
I haven't yet looked at how you build the payload, but this may also
affects the process to do it. I will give a look on it.
Actually, I am not sure I will have time to look at it during the next
few weeks. Could you add a TODO for now?
Cheers,
--
Julien Grall
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