> From: Roger Pau Monne
> Sent: Friday, May 20, 2022 9:38 PM
> 
> Properly indent the handling of LBR enable in MSR_IA32_DEBUGCTLMSR
> vmx_msr_write_intercept().
> 
> No functional change.
> 
> Signed-off-by: Roger Pau Monné <roger....@citrix.com>

Reviewed-by: Kevin Tian <kevin.t...@intel.com>

> ---
> Feel free to squash onto the previous patch, did separately to aid the
> readability of the previous change.
> ---
>  xen/arch/x86/hvm/vmx/vmx.c | 38 +++++++++++++++++++-------------------
>  1 file changed, 19 insertions(+), 19 deletions(-)
> 
> diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
> index 3f45ac05c6..ff10b293a4 100644
> --- a/xen/arch/x86/hvm/vmx/vmx.c
> +++ b/xen/arch/x86/hvm/vmx/vmx.c
> @@ -3540,31 +3540,31 @@ static int cf_check vmx_msr_write_intercept(
> 
>              if ( lbr->count )
>              {
> -            for ( ; lbr->count; lbr++ )
> -            {
> -                unsigned int i;
> -
> -                for ( i = 0; i < lbr->count; i++ )
> +                for ( ; lbr->count; lbr++ )
>                  {
> -                    int rc = vmx_add_guest_msr(v, lbr->base + i, 0);
> +                    unsigned int i;
> 
> -                    if ( unlikely(rc) )
> +                    for ( i = 0; i < lbr->count; i++ )
>                      {
> -                        gprintk(XENLOG_ERR,
> -                                "Guest load/save list error %d\n", rc);
> -                        domain_crash(v->domain);
> -                        return X86EMUL_OKAY;
> -                    }
> +                        int rc = vmx_add_guest_msr(v, lbr->base + i, 0);
> 
> -                    vmx_clear_msr_intercept(v, lbr->base + i, VMX_MSR_RW);
> +                        if ( unlikely(rc) )
> +                        {
> +                            gprintk(XENLOG_ERR,
> +                                    "Guest load/save list error %d\n", rc);
> +                            domain_crash(v->domain);
> +                            return X86EMUL_OKAY;
> +                        }
> +
> +                        vmx_clear_msr_intercept(v, lbr->base + i, 
> VMX_MSR_RW);
> +                    }
>                  }
> -            }
> 
> -            v->arch.hvm.vmx.lbr_flags |= LBR_MSRS_INSERTED;
> -            if ( lbr_tsx_fixup_needed )
> -                v->arch.hvm.vmx.lbr_flags |= LBR_FIXUP_TSX;
> -            if ( ler_to_fixup_needed )
> -                v->arch.hvm.vmx.lbr_flags |= LBR_FIXUP_LER_TO;
> +                v->arch.hvm.vmx.lbr_flags |= LBR_MSRS_INSERTED;
> +                if ( lbr_tsx_fixup_needed )
> +                    v->arch.hvm.vmx.lbr_flags |= LBR_FIXUP_TSX;
> +                if ( ler_to_fixup_needed )
> +                    v->arch.hvm.vmx.lbr_flags |= LBR_FIXUP_LER_TO;
>              }
>              else
>                  /* No model specific LBRs, ignore DEBUGCTLMSR.LBR. */
> --
> 2.36.0
> 

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