On 2/25/25 8:13 AM, Jan Beulich wrote:
On 24.02.2025 19:25, Oleksii Kurochko wrote:
@@ -25,6 +30,8 @@ The format is based on [Keep a
Changelog](https://keepachangelog.com/en/1.0.0/)
interrupts instead of logical destination mode.
### Added
+ - Support device passthrough when dom0 is PVH on Xen.
Was this work complete? (I'm truly uncertain, so not a rhetorical question.
IIRC SR-IOV is still unsupported, without which I'd not consider this work
complete.) In any event it's x86-only and hence would rather belong ...
I decided so because the patch series [1] seems to be fully merged.
[1]https://lore.kernel.org/xen-devel/[email protected]/T/#m0811f020321587ec94638e686800264724af1cdb
+ - Enable CONFIG_UBSAN (Arm, x86, RISC-V) for GitLab CI.
- On Arm:
- Experimental support for Armv8-R.
- Support for NXP S32G3 Processors Family and NXP LINFlexD UART driver.
@@ -34,6 +41,9 @@ The format is based on [Keep a
Changelog](https://keepachangelog.com/en/1.0.0/)
- On x86:
- xl suspend/resume subcommands.
- `wallclock` command line option to select time source.
+ - Add Support for Paging-Write Feature.
+ - Zen5 support (including new hardware support to mitigate the SRSO
+ speculative vulnerability).
... here?
Yes, it should be moved to x86. Based on the which files were changed during
this patch series I decided that it should be
in hypervisor changes, but now I checked which changes specifically done and
for Arm it was added basically only stubs in
libxl_arm.c.
~ Oleksii
