On 06/07/18 04:51, Saeed Mirzamohammadi wrote:
Hi,
Hello,
I'm trying to route all the physical interrupts to the guest domain
rather than being trapped in the Xen. I would like to know what is the
right way to do that?
May I ask what is your use case for that? If you route interrupts to the
guest, Xen will not receive vital interrupt such as the timer, UART,
SMMU interrupts, maintenance interrupt....
I know that HCR_IMO bit in the HCR_EL2 register is supposed to be for
routing the interrupts to the guest (Routing to EL1 instead of EL2).
link to the datasheet:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0500d/CIHJHAAG.html
So, I have tried doing the following in the leave_hypervisor_tail. I run
a simple hypercall and do the following lines before return (which is I
guess the last point of exit to the guest from hypervisor):
---------------------
/current->arch.hcr_el2 &= ~HCR_IMO;/
/WRITE_SYSREG(current->arch.hcr_el2, HCR_EL2);/
/isb();/
/----------------------/
/
/
/It looks like to be doing it right for all thevcpus butgets stuck after
return from leave_hypervisor_tail for the lastvcpu.
What do you mean by stuck? Do you see any logs?
HCR_EL2.IMO unset means the interrupt will get signaled to EL1. It does
not affect how interrupt will get read (e.g IAR).
Which interrupt controller are you using?
In case of GICv2, Xen is re-mapping GICC to GICV. So when the guest is
reading IAR, it will read the interrupts from the LRs. Not the physical
interface.
In case of GICv3, HCR_EL2.IMO will also control the access. So you
should be fine here.
However, in both case you will at least need to rework the way software
generated interrupts are sent to the guest. At the moment, they are
written in the LRs.
Cheers,
--
Julien Grall
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