On 18/06/2025 10:28, Julien Grall wrote: > Hi Oleksii, > > On 19/05/2025 16:50, Oleksii Moisieiev wrote: >> This patch introduces SCI driver to support for ARM EL3 Trusted >> Firmware-A >> (TF-A) which provides SCMI interface with multi-agnet support, as shown > > s/multi-agnet/multi-agent/ > will fix. >> below. >> >> +-----------------------------------------+ >> | | >> | EL3 TF-A SCMI | >> +-------+--+-------+--+-------+--+-------++ >> |shmem0 | |shmem1 | |shmem2 | |shmemX | >> +-----+-+ +---+---+ +--+----+ +---+---+ >> smc-id0 | | | | >> agent0 | | | | >> +-----v--------+---------+-----------+----+ >> | | | | | >> | | | | | >> +--------------+---------+-----------+----+ >> smc-id1 | smc-id2| smc-idX| >> agent1 | agent2 | agentX | >> | | | >> +----v---+ +--v-----+ +--v-----+ >> | | | | | | >> | Dom0 | | Dom1 | | DomX | >> | | | | | | >> | | | | | | >> +--------+ +--------+ +--------+ >> >> The EL3 SCMI multi-agent firmware expected to provide SCMI SMC/HVC >> shared >> memory transport for every Agent in the system. >> >> The SCMI Agent transport channel defined by pair: >> - smc-id: SMC/HVC id used for Doorbell >> - shmem: shared memory for messages transfer, Xen page aligned, >> p2m_mmio_direct_nc. > > It is not clear why we nention Xen page aligned and > p2m_mmio_direct_nc. Is this multi-agent protocol tied to Xen? > Xen allows mapping only page aligned chunks between domains. Current implementation supports only page-aligned chunks.
This means that we support only one channel per page, where the shared memory starts at the beginning of the page. > That said... p2m_mmio_direct_nc is a type used in the stage 2 > page-tables to indicate how we restrict access from the domain. > > The resulting memory attribute will be a combination of stage-1 + > stage-2. In the future, we may decide to use FWB which will allow Xen > to force a specific memory attribute. > > This is also purely internal decision. In the documentation, you > should spell out the memory attribute that should be used. From the > discussion on this patch, it is still unclear whether the region > should be mapped as Device nGnRE or normal memory non-cacheabl. > > Cheers, > I will reword this to explicitly mention the correct memory attribute. Documentation will be updated.
