On 02.12.2025 11:57, Andrew Cooper wrote:
> Fam12h processors aren't SMT-capable so there are no race condition worries
> with this path. Nevertheless, group it together with the other DE_CFG
> modifications.
With this, ...
> Fixes: d0c75dc4c028 ("x86/amd: Fix race editing DE_CFG")
... isn't this more like Amends:? Aiui this wouldn't need backporting.
> --- a/xen/arch/x86/cpu/amd.c
> +++ b/xen/arch/x86/cpu/amd.c
> @@ -920,6 +920,13 @@ void amd_init_de_cfg(const struct cpuinfo_x86 *c)
> if ( zenbleed_use_chickenbit() )
> new |= (1 << 9);
>
> + /*
> + * Erratum #665, doc 44739. Integer divide instructions may cause
> + * unpredictable behaviour.
> + */
> + if ( c->family == 0x12 )
> + new |= 1U << 31;
> +
> /* Avoid reading DE_CFG if we don't intend to change anything. */
> if ( !new )
> return;
> @@ -1201,15 +1208,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
> smp_processor_id());
> wrmsrl(MSR_AMD64_LS_CFG, value | (1 << 15));
> }
> - } else if (c->x86 == 0x12) {
> - rdmsrl(MSR_AMD64_DE_CFG, value);
> - if (!(value & (1U << 31))) {
> - if (c == &boot_cpu_data || opt_cpu_info)
> - printk_once(XENLOG_WARNING
> - "CPU%u: Applying workaround for
> erratum 665\n",
> - smp_processor_id());
> - wrmsrl(MSR_AMD64_DE_CFG, value | (1U << 31));
> - }
> }
Are you deliberately getting rid of the log message?
And I assume it is deliberate that the adjustment no longer is done when we're
running virtualized ourselves?
Both imo want making explicit in the description.
Jan
