On 29/12/2018 09:52, Pu Wen wrote:
> On 2018/12/28 20:40, Andrew Cooper wrote:
>> AMD hardware before Zen doesn't safe/restore the FPU error pointers
>> unless an unmasked FPU exception is pending.  Zen processors have a
>> feature bit indicating that this (mis)behaviour no longer exists.
>>
>> Express the common logic in terms of cpu_bug_fpu_err_ptr as Hygon
>> processors (being Zen derivatives) won't inherit this behaviour.
> ...
>> diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
>> index 15edd5d..7ca5684 100644
>> --- a/xen/arch/x86/xstate.c
>> +++ b/xen/arch/x86/xstate.c
>> @@ -369,15 +369,13 @@ void xrstor(struct vcpu *v, uint64_t mask)
>>       unsigned int faults, prev_faults;
>>   
>>       /*
>> -     * AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
>> +     * Some CPUs don't save/restore FDP/FIP/FOP unless an exception
>>        * is pending. Clear the x87 state here by setting it to fixed
>>        * values. The hypervisor data segment can be sometimes 0 and
>>        * sometimes new user value. Both should be ok. Use the FPU saved
>>        * data block as a safe address because it should be in L1.
>>        */
>> -    if ( (mask & ptr->xsave_hdr.xstate_bv & X86_XCR0_FP) &&
>> -         !(ptr->fpu_sse.fsw & ~ptr->fpu_sse.fcw & 0x003f) &&
>> -         boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
>> +    if ( cpu_bug_fpu_err_ptr )
>>           asm volatile ( "fnclex\n\t"        /* clear exceptions */
>>                          "ffree %%st(7)\n\t" /* clear stack tag */
>>                          "fildl %0"          /* load to clear state */
> It seems that the functions fpu_fxrstor and fpu_fxsave have the same
> problem, even though they are not called on Hygon Dhyana platform.
> Should them be fixed in the same way?

Oops yes - they should be fixed. They will get used if the user passes
"xsave=0" on the command line.

~Andrew

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