On Fri, Dec 28, 2018 at 12:39:34PM +0000, Andrew Cooper wrote: > AMD processors don't clear the base or limit fields when loading a NULL > segment, and Hygon processors inherit this behaviour. > > Express the logic in terms of cpu_bug_null_seg, and rearrange > preload_segment() have the more predictable condition first, not > reference AMD specifically. > > Tweak the inline ASM, as `mov %sreg` can be encoded with a memory > operand. > > Signed-off-by: Andrew Cooper <andrew.coop...@citrix.com>
Reviewed-by: Wei Liu <wei.l...@citrix.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
