Hi Wolfgang,
Well these are convincing figures. Could you let me know what card (type
number) you ran the tests on so that I am not unpleasantly surprised
when I finally go to PCI.
I will continue development on my laptop with the dongle for the time
being. It would be interesting to see what happens to the latency after
your proposed changes are in effect.
Thanks,
Roland
Wolfgang Grandegger wrote:
Hallo,
in the meantime I have measured the latencies introduced through
messages sent and received by RT-Socket-CAN. The SJA1000 register access
times on my rather old PC with an Athlon 1100 Mhz are:
PEAK-Dongle: read access: 11807 ns
PEAK-Dongle: write access: 11677 ns
IXXAT-PCI : read access: 729 ns
IXXAT-PCI : write access: 305 ns
I measured an increase of the latency of approx. 170us with the
PEAK-Dongle and approx 13us with the IXXAT-PCI card for the reception of
a full CAN message (with 8 bytes payload). Sending messages is a bit
less disturbing. I have attached a small patch to measure the SJA1000
register access times when the driver is initialized. You are welcome to
apply it on your setup and report the results. I'm especially interested
in numbers for the ISA bus (or PC-104).
Wolfgang.
------------------------------------------------------------------------
+ diff -u xenomai/ksrc/drivers/can/rtcan_dev.c.IOTEST
xenomai/ksrc/drivers/can/rtcan_dev.c
+ diff -u xenomai/ksrc/drivers/can/sja1000/rtcan_sja1000.c.IOTEST
xenomai/ksrc/drivers/can/sja1000/rtcan_sja1000.c
--- xenomai/ksrc/drivers/can/sja1000/rtcan_sja1000.c.IOTEST 2007-02-26
09:17:27.000000000 +0100
+++ xenomai/ksrc/drivers/can/sja1000/rtcan_sja1000.c 2007-03-13
10:01:47.000000000 +0100
@@ -728,6 +728,30 @@
if (chip == NULL)
return -EINVAL;
+#if 1
+ {
+ nanosecs_abs_t begin, diff;
+ volatile u8 reg;
+ int i, count = 100000;
+ begin = rtdm_clock_read();
+ for (i = 0; i < count; i++) {
+ reg = chip->read_reg(dev, 0);
+ }
+ diff = rtdm_clock_read() - begin;
+ printk("%s: register read time for %d accessed: %ld (%ld per access)\n",
+ dev->board_name, count,
+ (unsigned long)diff, (unsigned long)diff / count);
+ begin = rtdm_clock_read();
+ for (i = 0; i < count; i++) {
+ chip->write_reg(dev, 0, reg);
+ }
+ diff = rtdm_clock_read() - begin;
+ printk("%s: register write time for %d accessed: %ld (%ld per
access)\n",
+ dev->board_name, count,
+ (unsigned long)diff, (unsigned long)diff / count);
+ }
+#endif
+
/* Set dummy state for following call */
dev->state = CAN_STATE_ACTIVE;
/* Enter reset mode */
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