Patrick wrote:
> Hi all,
>
>
>
> I am using a RT event flag structure to start a task from an ISR.
>
> The task waits on rt_event_wait and when the IRQ occurs the ISR executes
> rt_event_signal (the ISR code only clears the flag and calls
> rt_event_signal).
>
> I'm using an oscilloscope to measure the length of the ISR and the first
> occurrence lasts about 20us and all the next occurrences last about 4us.
>
>
>
> My question is why the first ISR is so long?
>
>
>
> For information I use xenomai 2.4 rc4 on ARM pxa270 machine with 2.6.20
> kernel.
Typical worst case interrupt latency on ARM is around 50 us, so 20 us is
not that long. What you are observing is probably a cache effect. In
this case, you should observe 20us after each user-space context switch
since on ARM, cache is flushed at each user-space context switch.
--
Gilles Chanteperdrix.
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