On 04/23/2012 01:05 PM, Willy Lambert wrote:
> 2012/4/23 Philippe Gerum <r...@xenomai.org>:
>> On 04/23/2012 03:51 AM, Willy Lambert wrote:
>>>
>>> Hi,
>>>
>>> I have a message  in dmesg about SMI workaround :
>>> Xenomai: SMI-enabled chipset found, but SMI workaround disabled
>>>          (check CONFIG_XENO_HW_SMI_WORKAROUND). You may encounter
>>>          high interrupt latencies!
>>>
>>> My kernel should be configured properly and following the "In case of
>>> high latencies" of
>>> http://www.xenomai.org/index.php/Configuring_x86_kernels thread, I did
>>> some tests.
>>>
>>> Latency test is here (if it is us it should be ok no ?):
>>>
>>
>> Yes, this looks ok, but you need to run this test longer, and try a few
>> usual suspects like plugging in/out USB devices while doing so (e.g. mouse,
>> netdev).
>>
>> The point of this message is to tell you that your chipset is known to
>> create latency issues in some cases (like most Intel chipset these days),
>> but you did not enable the Xenomai code which works around such issues by
>> shutting down problematic SMI sources. That may be right, or even required
>> to leave all the SMI sources enabled (e.g. thermal control), but this might
>> also lead to unacceptable latency spots. YMMV.
>>
>> This is basically a heads up message.
>>
>> --
>> Philippe.
> 
> Ok, thanks for answers.
> 
> I did the test again , playing with usb and using the stress program
> to generate CPU load. The max latency for now is 15us in 4 mins. So I
> think it will be ok to keep SMI on for the time. Please let me know if
> this test is still stoo short.
> ^C---|-----------|-----------|-----------|--------|------|-------------------------
> RTS|      0.604|      2.332|     15.161|       0|     0|    00:03:59/00:03:59
> 
> Do you know by chance where I can found infos about SMI sources ? I
> suppose it is not in the ICH8M docs, it would be in my board doc ? Or
> have I a soft way to do this check so that I don't have to spend time
> with my vendor which will obviously have hard time to answer that ?

The list of potential SMI sources IS in the ICH8M docs. Whether these
sources are used by your board essentially depends on the BIOS
implementation (an SMI traps into BIOS code). So the theoretical answer
to this question is to disassemble the the BIOS blob.

The practical answer is to run latency during a few hours, under stress
using all the hardware which will be used in your target project
(network card, disk I/Os, USB key I/Os, etc...). If an SMI is used but
latencies remain acceptable with regard to your goals, no reason to bother.

If you find unacceptable latencies, see the TROUBLESHOOTING guide, to
see how to enable SMI workaround.

-- 
                                                                Gilles.

_______________________________________________
Xenomai-help mailing list
Xenomai-help@gna.org
https://mail.gna.org/listinfo/xenomai-help

Reply via email to