Lopes, Alexandre wrote:
>> -----Ursprüngliche Nachricht-----
>> Von: Gilles Chanteperdrix [mailto:[email protected]]
>> Gesendet: Donnerstag, 11. Juni 2015 19:35
>> An: Lopes, Alexandre
>> Cc: Gilles Chanteperdrix; Lowell Gilbert; [email protected]
>> Betreff: Re: AW: [Xenomai] init failed code -19 on Cyclone V SoC
>>
>> The Linux mainline code refuses to start the global timer with old
>> revisions of the cortex A9 core which global timer is not exactly the
>> same
>> as with newer revisions (there is a difference in what condition
>> triggers
>> the timer interrupt which make it possible for the old revisions timer
>> to
>> not receive an interrupt if the programmed delay is too short, whereas
>> it
>> can not happen with newer versions). So, the SOCs in mainline based on
>> such old versions do not even bother to declare the global timer
>> registers
>> in the DT.
>>
>
> I see. I've noticed the DTS for the Zynq-7000 does have a node for the
> global timer. Since I believe the Cyclone V and the Zynq-7000 use
> identical
> Cortex A9 revisions, the reason might then be that Altera never pushed for
> it
> (supported by the fact that they don't use it even in their
> vendor-specific
> Kernel, like I replied to Lowell)
Show me the beginning of your kernel boot log, it should allow us to see
what revision of cortex A9 you are using, and verify whether this version
is rejected by the global timer driver. We do not need to "believe" anything
we can verify.
--
Gilles.
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