On Fri, Jan 24, 2003 at 01:14:18AM -0800, hy0 wrote:
> Thanks for the explanations, now I can see what this is about. However I
> still have some concerns about this code.
> Indeed, Radeon chips do have 0x1c0 (misnamed MPP_TB_CONFIG) as SEPROM_CNTL
> register. Modifying/restoring its SCK_PRESCALE field is unlikely to be the
> cause of this screen corruption problem.
> In the current code path, even for a properly POSTed card, MEM_CNTL is set
> to zero and then restored back. This step may cause some side effect to the
> memory controller. Properly initializing MEM_CNTL/MEM_SIZE should take
> several steps (I may miss something): 1. wait for memory control idle
> (MC_STATUS). 2. configure each channel (MEM_CNTL). 3. reset memory
> (MEM_SDRAM_MOD_REG). 4. check if each channel works correctly. Simply
> setting MEM_CNTL to zero and then restoring it back may put memory
> controller in some bad state. Since Cedric doesn't seem to have this problem
> with old CVS code, maybe he can try to change the current CVS code from
> #if 0/*  !defined(__alpha__) */
> back to
> #if !defined(__alpha__)
> See if it can make any difference. At least we can rule out MEM_CNTL related
> code being the cause.
>

Cool, it work, thanks. There was only a bug in the keyboard mapping but
it's not related.

Cedric
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