On Wed, 31 Jul 2002 [EMAIL PROTECTED] wrote:
> We are working with Daniel on Super Micro MB problem. As you suggested,
> we ran the utility - pcitweak in order to set I/O base address for PCI
> card. We performed it in the following manner:
> 1. We acquired the information about I/O base address by command
> #scanpci -v
> following line is information snippet copied from the output of
> scanpci -v command.
> ---------------------------------------------------------------------
> pci bus 0x0 cardnum 0x14 function 0x0000: vendor 0x1002 device 0x4752
> ATI Mach64 GR
> CardVendor 0x1002 card 0x8008
> STATUS 0x0290 COMMAND 0x0080
> CLASS 0x03 0x00 0x00 REVISION 0x27
> APBASE 0x30000000 addr 0x30000000
> BLOCKIO 0xffffff01 addr 0xffffff00
> REGBASE 0x31000000 addr 0x31000000
> BASEROM 0xfffe0000 addr 0xfffe0000 not-decode-enabled
> MAX_LAT 0x00 MIN_GNT 0x08 INT_PIN 0x01 INT_LINE 0x10
> SPARSEIO 0x2ec Block IO enabled Disable 0x46E8
> ---------------------------------------------------------------------
> 2. We used pcitweak to modify I/O base address by
> #pcitweak -w 00:14:0 -h 0x14 0xff01
> #pcitweak -w 00:14:0 -h 0x16 0xffff
> 3. After doing this, we tried running Xwindows but alas, faced the same
> problem as we had before.
No. On ix86 (among others), I/O bases must be < 64K. Instead do
pcitweak -w 0:14:0 0x14 0x0000nn01
... where "nn" should be chosen to not conflict with any other I/O range
in the system. Furthermore, "nn" must not be "00", nor "ff". This'll
reserve I/O ports nn00 to nnff inclusive.
Marc.
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| Marc Aurele La France | work: 1-780-492-9310 |
| Computing and Network Services | fax: 1-780-492-1729 |
| 352 General Services Building | email: [EMAIL PROTECTED] |
| University of Alberta +-----------------------------------+
| Edmonton, Alberta | |
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+----------------------------------+-----------------------------------+
XFree86 Core Team member. ATI driver and X server internals.
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