On 08/07/2012 04:08 PM, Bob Friesenhahn wrote:
> On Tue, 7 Aug 2012, Sašo Kiselkov wrote:
>> MLC is so much cheaper that you can simply slap on twice as much and use
>> the rest for ECC, mirroring or simply overprovisioning sectors. The
>> common practice to extending the lifecycle of MLC is by "short-stroking"
>> it, i.e. using only a fraction of the capacity. E.g. a 40GB MLC unit
>> with 5-10k cycles per cell can be turned into a 4GB unit (with the
>> controller providing wear leveling) with effectively 50-100k cycles
>> (that's SLC land) for about a hundred bucks. Also, since I'm mirroring
>> it already with ZFS checksums to provide integrity checking, your
>> argument simply doesn't hold up.
> Remember he also said that the current product is based principally on
> an FPGA.  This FPGA must be interfacing directly with the Flash device
> so it would need to be substantially redesigned to deal with MLC Flash
> (probably at least an order of magnitude more complex), or else a
> microcontroller would need to be added to the design, and firmware would
> handle the substantial complexities.  If the Flash device writes slower,
> then the power has to stay up longer.  If the Flash device reads slower,
> then it takes longer for the "drive" to come back on line.

Yeah, I know, but then, you can interface with an existing
industry-standard flash controller, no need to design your own (reinvent
the wheel). The choice of FPGA is good for some things, but flexibility
in exchanging components certainly isn't one of them.

If I were designing something akin to the X1, I'd go with a generic
embedded CPU design (e.g. a PowerPC core) interfacing with standard
flash components and running the primary front-end from the chip's
on-board DRAM. I mean, just to give you some perspective, for $2k I
could build a full computer with 8GB of mirrored ECC DRAM which
interfaces via an off-the-shelf 6G SAS HBA (with two 4x wide 6G SAS
ports) or perhaps even an InfiniBand adapter with RDMA with the host
machine, includes a small SSD in it's SATA bay and a tiny UPS battery to
run the whole thing for a few minutes while we write DRAM contents to
flash in case of a power outage (the current X1 doesn't even include
this in its base design). And that's something I could do with
off-the-shelf components for less than $2k (probably a whole lot less)
with a production volume of _1_.

> Quite a lot of product would need to be sold in order to pay for both
> re-engineering and the cost of running a business.

Sure, that's why I said it's David vs. Goliath. However, let's be honest
here, the X1 isn't a terribly complex product. It's quite literally a
tiny computer with some DRAM and a feature to dump DRAM contents to
Flash (and read it back later) in case power fails. That's it.

zfs-discuss mailing list

Reply via email to