Hi Indrajit,
I'm probably confused as what your question is.
I'd look in the schematics for a specific FPGA pin you might want to be
single-ended
and then look at the voltage rail delivered to FPGA IO bank that pin
is part of. If the voltage rail is 2.5V aka 2V5 then the max
swing of the pin in question is 0 to 2.5V.
Programming the FPGA with some gateware that configures that IO pin as a 3.3V
standard, such as LVTTL, doesn't mean that will actually work. It needs 3.3V
delivered to that IO Bank.
The QSH_A/B_D_P/N signals at delivered to P9 are part of IO banks
powered by 2.5V banks, as is required by Xilinx's LVDS
signalling conventions. 2.5V is the max swing of the QSH signal at P9.
Period.
Xilinx has single ended signalling protocols that run off of 2.5V
for example LVCMOS25. SSTL2 also runs off of 2.5V. So it looks like
the QSH signals at P9 could singled ended 0 to 2.5V CMOS signals
if the appropriate gateware was programmed.
I can offer no info as to what the CASPER tools do in this, or
any other, regard.
It may be possible to rework the Roach1 to deliver 3.3V
to the QSH IO banks. I've never looked into that; it may be
truly ugly.
Matt
On Tue, 11 Jul 2017, Indrajit Vittal Barve wrote:
Date: Tue, 11 Jul 2017 21:02:39 +0530
From: Indrajit Vittal Barve <indra...@iiap.res.in>
To: Matt Dexter <mdex...@berkeley.edu>,
CASPER Mailing List <casper@lists.berkeley.edu>
Subject: Re: [casper] QSH I/O as single ended signal.
Thanks Matt dexter,
I also got the same page and bank details. But
I am looking for the single ended usage.
With thanks and regards
Indrajit
On 11 Jul 2017 8:48 p.m., Matt Dexter <mdex...@berkeley.edu> wrote:
Hi,
I've never used the QSH signals as single ended IO.
Page 12 of The Roach1 Schematics shows the source of the QSH_A/B_D_P/N
signals
as FPGA IO banks 3, 11, 13, 15, 17, 19, 21
page 4 shows those banks powered at 2V5 aka 2.5VDC.
The 2V5 signal is hardwired to the VCCIO pins; there is no jumper.
Thus I'd predict only 2.5V IO levels would be supported on the QSH
signals.
Matt
On Tue, 11 Jul 2017, indrajit wrote:
> Date: Tue, 11 Jul 2017 08:35:21 +0530
> From: indrajit <indra...@iiap.res.in>
> To: CASPER Mailing List <casper@lists.berkeley.edu>
> Subject: [casper] QSH I/O as single ended signal.
>
> Dear All,
>
> Is there any one used QSH-DP LVDS I/O on ROACH-1 as single ended signal
> output.
> QSH Yellow block has an option Single ended.
> If then what is the output level is it 3.3V or 2.5 V ?
>
> Thanks
> Indrajit
>
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